fix type propagation of struct fields bit accesses

This commit is contained in:
Zachary Snow 2020-02-20 00:19:10 -05:00
parent 470fa01eb2
commit a415d9eb3d
4 changed files with 66 additions and 1 deletions

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@ -460,7 +460,7 @@ convertAsgn structs types (lhs, expr) =
if maybeFields == Nothing
then (Implicit Unspecified [], Bit (Dot e' x) i)
else if Map.notMember structTf structs
then (fieldType, Bit (Dot e' x) i)
then (dropInnerTypeRange fieldType, Bit (Dot e' x) i)
else (dropInnerTypeRange fieldType, Bit e' i')
where
(subExprType, e') = convertSubExpr e

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@ -0,0 +1,20 @@
typedef struct packed {
logic [3:0] a;
logic [3:0] b;
} pair;
typedef struct packed {
pair [1:0] x;
pair [1:0] y;
} pair_list_pair;
module Example(data, p1, p2, out_x, out_y);
input pair_list_pair data;
input logic p1;
input logic p2;
output logic [3:0] out_x;
output logic [3:0] out_y;
assign out_x = p2 ? data.x[p1].a : data.x[p1].b;
assign out_y = p2 ? data.y[p1].a : data.y[p1].b;
endmodule

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@ -0,0 +1,9 @@
module Example(data, p1, p2, out_x, out_y);
input wire [31:0] data;
input wire p1, p2;
output wire [3:0] out_x;
output wire [3:0] out_y;
assign out_x = p2 ? data[p1 * 8 + 20 +:4] : data[p1 * 8 + 16 +:4];
assign out_y = p2 ? data[p1 * 8 + 4 +:4] : data[p1 * 8 + 0 +:4];
endmodule

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@ -0,0 +1,36 @@
module top;
reg [31:0] data;
reg p1, p2;
wire [3:0] out_x;
wire [3:0] out_y;
Example example(data, p1, p2, out_x, out_y);
task exhaust;
begin
#1 p1 = 0;
#1 p2 = 0;
#1 p1 = 0;
#1 p2 = 1;
#1 p1 = 1;
#1 p2 = 0;
#1 p1 = 1;
#1 p2 = 1;
end
endtask
initial begin
$monitor("%2d %b %b %b %b %b", $time,
data, p1, p2, out_x, out_y);
#1 data = 32'ha7107338;
exhaust;
#1 data = 32'h8f8259e4;
exhaust;
#1 data = 32'h80ad046a;
exhaust;
#1 data = 32'hbf93017e;
exhaust;
#1 data = 32'he6458a2d;
exhaust;
end
endmodule