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simplify numeric negation

This commit is contained in:
Zachary Snow 2019-10-02 23:42:56 -04:00
parent a77347f5cc
commit 89de289bec
1 changed files with 4 additions and 0 deletions
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4
src/Language/SystemVerilog/AST/Expr.hs
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@ -164,6 +164,10 @@ readNumber n =
simplify :: Expr -> Expr
simplify (UniOp LogNot (Number "1")) = Number "0"
simplify (UniOp LogNot (Number "0")) = Number "1"
simplify (orig @ (UniOp UniSub (Number n))) =
case readNumber n of
Nothing -> orig
Just x -> Number $ show (-x)
simplify (orig @ (Repeat (Number n) exprs)) =
case readNumber n of
Nothing -> orig