substitute constants from type information across scopes

This commit is contained in:
Zachary Snow
2021-02-10 12:56:26 -05:00
parent 6d2cdf1d21
commit 87ea9de853
10 changed files with 378 additions and 41 deletions
+54
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module top;
parameter WIDTH = 1;
if (1) begin : a
localparam tmp = WIDTH * 2;
if (1) begin : c
localparam WIDTH = tmp * 3;
reg [WIDTH-1:0] x;
end
end
if (1) begin : b
localparam tmp = WIDTH * 5;
if (1) begin : d
localparam WIDTH = tmp * 7;
reg [WIDTH-1:0] x;
end
end
reg [$bits(a.c.x):0] a_c_x;
reg [$bits(b.d.x):0] b_d_x;
if (1) begin : e
localparam tmp = WIDTH * 11;
if (1) begin : f
localparam WIDTH = tmp * 13;
reg [WIDTH-1:0] x;
reg [$bits(a.c.x):0] a_c_x;
reg [$bits(b.d.x):0] b_d_x;
initial begin
a_c_x = 1;
b_d_x = 1;
$display("B a.c.x %b", a.c.x);
$display("B a_c_x %b", a_c_x);
$display("B b.d.x %b", b.d.x);
$display("B b_d_x %b", b_d_x);
end
end
end
reg [$bits(e.f.x):0] e_f_x;
reg [$bits(e.f.a_c_x):0] e_f_a_c_x;
reg [$bits(e.f.b_d_x):0] e_f_b_d_x;
initial begin
e_f_x = 1'sb1;
e_f_a_c_x = 1'sbx;
e_f_b_d_x = 1'sbz;
$display("A a.c.x %b", a.c.x);
$display("A a_c_x %b", a_c_x);
$display("A b.d.x %b", b.d.x);
$display("A b_d_x %b", b_d_x);
$display("A e.f.x %b", e.f.x);
$display("A e_f_x %b", e_f_x);
$display("A e.f.a_c_x %b", e.f.a_c_x);
$display("A e_f_a_c_x %b", e_f_a_c_x);
$display("A e.f.b_d_x %b", e.f.b_d_x);
$display("A e_f_b_d_x %b", e_f_b_d_x);
end
endmodule
+48
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module top;
parameter WIDTH = 1;
if (1) begin : a
if (1) begin : c
reg [WIDTH*2*3-1:0] x;
end
end
if (1) begin : b
if (1) begin : d
reg [WIDTH*5*7-1:0] x;
end
end
reg [WIDTH*2*3:0] a_c_x;
reg [WIDTH*5*7:0] b_d_x;
if (1) begin : e
if (1) begin : f
reg [WIDTH*11*13-1:0] x;
reg [WIDTH*2*3:0] a_c_x;
reg [WIDTH*5*7:0] b_d_x;
initial begin
a_c_x = 1;
b_d_x = 1;
$display("B a.c.x %b", a.c.x);
$display("B a_c_x %b", a_c_x);
$display("B b.d.x %b", b.d.x);
$display("B b_d_x %b", b_d_x);
end
end
end
reg [WIDTH*11*13:0] e_f_x;
reg [WIDTH*2*3+1:0] e_f_a_c_x;
reg [WIDTH*5*7+1:0] e_f_b_d_x;
initial begin
e_f_x = 1'sb1;
e_f_a_c_x = 1'sbx;
e_f_b_d_x = 1'sbz;
$display("A a.c.x %b", a.c.x);
$display("A a_c_x %b", a_c_x);
$display("A b.d.x %b", b.d.x);
$display("A b_d_x %b", b_d_x);
$display("A e.f.x %b", e.f.x);
$display("A e_f_x %b", e_f_x);
$display("A e.f.a_c_x %b", e.f.a_c_x);
$display("A e_f_a_c_x %b", e_f_a_c_x);
$display("A e.f.b_d_x %b", e.f.b_d_x);
$display("A e_f_b_d_x %b", e_f_b_d_x);
end
endmodule
+72
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`define TYPEOF(x) wire [$bits(x) - 1:0]
// The `REF` sections of this test are workarounds for steveicarus/iverilog#483
module top;
genvar i;
if (1) begin : blk
for (i = 0; i < 3; i = i + 1) begin : prev
localparam V = i * 2;
localparam W = V;
wire [W:0] x;
end
for (i = 0; i < 2; i = i + 1) begin : loop
`TYPEOF(prev[i+1].x) x;
if (1) begin : a
localparam j = i - 3;
if (1) begin : b
localparam i = j + 2;
`TYPEOF(prev[i+2].x) x;
if (1) begin : c
localparam j = i - 4;
if (1) begin : d
localparam i = j + 7;
localparam z = i - 1;
`TYPEOF(prev[z].x) x;
if (1) begin : e
localparam i = 0;
`ifdef REF
localparam j = 3;
`else
localparam j = $bits(blk.loop[i].a.b.c.d.x);
`endif
wire [j-1:0] y;
end
end
end
end
end
end
end
`ifdef REF
wire [1*2:0] a;
wire [2*2:0] b;
wire [1*2:0] c;
wire [2*2:0] d;
wire [1*2:0] e;
wire [2*2:0] f;
wire [1*2:0] g;
wire [1*2:0] h;
`else
`TYPEOF(blk.loop[0].x) a;
`TYPEOF(blk.loop[1].x) b;
`TYPEOF(blk.loop[0].a.b.x) c;
`TYPEOF(blk.loop[1].a.b.x) d;
`TYPEOF(blk.loop[0].a.b.c.d.x) e;
`TYPEOF(blk.loop[1].a.b.c.d.x) f;
`TYPEOF(blk.loop[0].a.b.c.d.e.y) g;
`TYPEOF(blk.loop[1].a.b.c.d.e.y) h;
`endif
`define DUMP(x) assign x = 1; initial $display(`"x: %b (%0d bits)`", x, $bits(x));
`DUMP(a) `DUMP(b) `DUMP(c) `DUMP(d) `DUMP(e) `DUMP(f) `DUMP(g) `DUMP(h)
`DUMP(blk.loop[0].x)
`DUMP(blk.loop[1].x)
`DUMP(blk.loop[0].a.b.x)
`DUMP(blk.loop[1].a.b.x)
`DUMP(blk.loop[0].a.b.c.d.x)
`DUMP(blk.loop[1].a.b.c.d.x)
`DUMP(blk.loop[0].a.b.c.d.e.y)
`DUMP(blk.loop[1].a.b.c.d.e.y)
endmodule
+2
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`define REF 1
`include "typeof_scope.sv"