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typeof logical negation

This commit is contained in:
Zachary Snow 2020-09-13 23:51:13 -04:00
parent 7e2450ea5e
commit 6d907e0985
3 changed files with 6 additions and 0 deletions
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1
src/Convert/TypeOf.hs
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@ -134,6 +134,7 @@ typeof (orig @ (Dot e x)) = do
typeof (Cast (Right s) _) = return $ typeOfSize s
typeof (UniOp UniSub e ) = typeof e
typeof (UniOp BitNot e ) = typeof e
typeof (UniOp LogNot _ ) = return $ IntegerVector TLogic Unspecified []
typeof (BinOp Pow e _) = typeof e
typeof (BinOp ShiftL e _) = typeof e
typeof (BinOp ShiftR e _) = typeof e

2
test/basic/typeof.sv
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@ -32,6 +32,7 @@ module top;
type(FLAG ? x : y) c = FLAG ? x : y;
type(!FLAG ? x : y) d = !FLAG ? x : y;
type($clog2(x)) e = $clog2(x);
type(!e) f = !e;
$display("%b %d %d", x, $left(x), $right(x));
$display("%b %d %d", y, $left(y), $right(y));
$display("%b %d %d", z, $left(z), $right(z));
@ -40,6 +41,7 @@ module top;
$display("%b %d %d", c, $left(c), $right(c));
$display("%b %d %d", d, $left(d), $right(d));
$display("%b %d %d", e, $left(e), $right(e));
$display("%b %d", f, $bits(f));
end
parameter W = 4;

3
test/basic/typeof.v
View File

@ -34,6 +34,7 @@ module top;
reg [7:0] b;
reg [3:0] c, d;
integer e;
reg f;
x = 4'b1011;
y = x ^ 3'b111;
z = x ^ 5'b11111;
@ -42,6 +43,7 @@ module top;
c = FLAG ? x : y;
d = !FLAG ? x : y;
e = $clog2(x);
f = !e;
$display("%b %d %d", x, 4, 1);
$display("%b %d %d", y, 3, 0);
$display("%b %d %d", z, 4, 0);
@ -50,6 +52,7 @@ module top;
$display("%b %d %d", c, 3, 0);
$display("%b %d %d", d, 3, 0);
$display("%b %d %d", e, 31, 0);
$display("%b %d", f, 1);
end
parameter W = 4;