updated documentation

README.md

@@ -43,14 +43,16 @@ You must have [Stack] installed to build sv2v.
 [Stack]: https://www.haskellstack.org/
 
 ```
-git clone https://github.com/zachjs/sv2v
+git clone https://github.com/zachjs/sv2v.git
 cd sv2v
-stack setup
 make
 ```
 
-This creates the executable at `./bin/sv2v`. You can install the binary by
-running `stack install`.
+This creates the executable at `./bin/sv2v`. Stack takes care of installing
+exact (compatible) versions of the compiler and sv2v's build dependencies.
+
+You can install the binary to your local bin path (typically `~/.local/bin`) by
+running `stack install`, or copy over the executable manually.
 
 
 ## Usage
@@ -75,6 +77,17 @@ Common flags:
 ```
 
 
+## Supported Features
+
+sv2v supports most synthesizable SystemVerilog features. Current notable
+exceptions include `package`/`import`/`export`, interfaces _with parameter
+bindings_, and complex (non-identifier) `modport` expressions. Assertions are
+also supported, but are simply dropped during conversion.
+
+If you find a bug or have a feature request, please create an issue. Preference
+will be given to issues which include examples or test cases.
+
+
 ## SystemVerilog Frontend
 
 This project contains a preprocessor and lexer, a parser, and an abstract syntax

src/Job.hs

@@ -31,7 +31,7 @@ defaultJob = Job
     , define = def &= typ "NAME[=VALUE]" &= help "define a macro for preprocessing"
     }
     &= program "sv2v"
-    &= summary "sv2v v0.0.1, (C) Zachary Snow 2019, Tom Hawkins, 2011-2015"
+    &= summary "sv2v v0.0.1, (C) 2019 Zachary Snow, 2011-2015 Tom Hawkins"
     &= details [ "sv2v converts SystemVerilog to Verilog."
                , "More info: https://github.com/zachjs/sv2v" ]
 

test/relong/README.md

@@ -3,7 +3,11 @@
 These tests are borrowed from Reid Long's [HDL Examples
 repository](https://bitbucket.org/ReidLong/hdl-examples). That repository was
 intended to provide examples for how the conversions in this project could be
-done.
+done. sv2v does not necessarily convert code as demonstrated in the examples.
+Notably, sv2v does not create `generate` blocks when converted vectors with
+multiple packed dimensions, uses `localparam`s rather than macros for `enum`
+conversion, and converts `struct` literals to concatenations, rather than
+multiple statements.
 
 Each test case (say, "foo") is comprised of the following files: