mirror of https://github.com/zachjs/sv2v.git
handle functions with unpacked return typenames
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8a554113c8
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@ -477,8 +477,12 @@ scopeModuleItemT declMapper moduleItemMapper genItemMapper stmtMapper =
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redirectTFDecl :: Type -> Identifier -> ScoperT a m (Type, Identifier)
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redirectTFDecl typ ident = do
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res <- declMapper $ Variable Local typ ident [] Nil
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let Variable Local newType newName [] Nil = res
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return (newType, newName)
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let Variable Local newType newName newRanges Nil = res
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return $ if null newRanges
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then (newType, newName)
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else
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let (tf, rs2) = typeRanges newType
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in (tf $ newRanges ++ rs2, newName)
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wrappedModuleItemMapper :: ModuleItem -> ScoperT a m ModuleItem
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wrappedModuleItemMapper item = do
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@ -0,0 +1,27 @@
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module mod(
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input logic clk,
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input byte row, col,
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output logic [47:0] flat
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);
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typedef byte T [2][3];
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function automatic T f;
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input T inp;
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for (int i = 0; i < 2; i++)
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for (int j = 0; j < 3; j++)
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f[i][j] = (i + 1) * (j + 1) * inp[i][j];
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endfunction
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byte arr [2][3];
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byte res [2][3];
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assign flat =
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{ res[1][2], res[1][1], res[1][0]
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, res[0][2], res[0][1], res[0][0] };
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initial
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{ arr[1][2], arr[1][1], arr[1][0]
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, arr[0][2], arr[0][1], arr[0][0] } = 0;
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always @(posedge clk) begin
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arr[row][col] += 1;
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res = f(arr);
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end
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endmodule
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@ -0,0 +1,24 @@
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`define IDX(a, r, c) a[(r * 3 + c) * 8 +: 8]
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module mod(
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input clk,
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input [7:0] row, col,
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output [47:0] flat
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);
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function automatic [47:0] f;
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input [47:0] inp;
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integer i, j;
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for (i = 0; i < 2; i = i + 1)
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for (j = 0; j < 3; j = j + 1)
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`IDX(f, i, j) = (i + 1) * (j + 1) * `IDX(inp, i, j);
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endfunction
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reg [47:0] arr;
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reg [47:0] res;
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assign flat = res;
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initial arr = 0;
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always @(posedge clk) begin
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`IDX(arr, row, col) = `IDX(arr, row, col) + 1;
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res = f(arr);
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end
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endmodule
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@ -0,0 +1,22 @@
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module top;
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reg clk;
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initial begin
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clk = 0;
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forever
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#1 clk = ~clk;
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end
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reg [7:0] row, col;
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wire [47:0] flat;
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mod m(clk, row, col, flat);
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integer i, j;
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initial begin
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$monitor("%3d %0d %0d %b", $time, row, col, flat);
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repeat (10)
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for (row = 0; row < 2; row = row + 1)
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for (col = 0; col < 3; col = col + 1)
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#2;
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$finish;
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end
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endmodule
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