mirror of https://github.com/zachjs/sv2v.git
add hierarchy path to inlined interface hash
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@ -16,6 +16,8 @@
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* Fixed `logic` incorrectly converted to `wire` even when provided to a task or
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* Fixed `logic` incorrectly converted to `wire` even when provided to a task or
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function output port
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function output port
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* Fixed conversion of fields accessed from explicitly-cast structs
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* Fixed conversion of fields accessed from explicitly-cast structs
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* Fixed generated parameter name collisions when inlining interfaces and
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interfaced-bound modules
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* Fixed conversion of enum item names and typenames nested deeply within the
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* Fixed conversion of enum item names and typenames nested deeply within the
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left-hand side of an assignment
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left-hand side of an assignment
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* Fixed `input signed` ports of interface-using modules producing invalid
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* Fixed `input signed` ports of interface-using modules producing invalid
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@ -422,7 +422,7 @@ inlineInstance global ranges modportBindings items partName
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scoper = scopeModuleItem
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scoper = scopeModuleItem
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traverseDeclM traverseModuleItemM traverseGenItemM traverseStmtM
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traverseDeclM traverseModuleItemM traverseGenItemM traverseStmtM
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key = shortHash (partName, instanceName)
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key = shortHash (partName, instanceName, hierarchyPath global)
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-- synthetic modports to be collected and removed after inlining
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-- synthetic modports to be collected and removed after inlining
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bundleModport = Modport "" (impliedModport items)
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bundleModport = Modport "" (impliedModport items)
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@ -0,0 +1,16 @@
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interface Interface;
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parameter P;
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logic [P - 1:0] x;
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endinterface
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module Module1(Interface i);
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localparam P = i.P;
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initial $display("Module1 P=%0d", P);
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endmodule
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module Module2(Interface i);
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Interface #(i.P) i();
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Module1 m(i);
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endmodule
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module top;
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Interface #(5) i();
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Module2 m(i);
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endmodule
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@ -0,0 +1,3 @@
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module top;
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initial $display("Module1 P=%0d", 5);
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endmodule
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