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parser rejects function input decls with bad directions

This commit is contained in:
Zachary Snow 2019-09-22 23:29:02 -04:00
parent 2d81c6470f
commit 2d8e6bddd3
1 changed files with 4 additions and 2 deletions
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6
src/Language/SystemVerilog/Parser/Parse.y
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@ -1218,8 +1218,10 @@ combineDeclsAndStmts :: ([Decl], [Stmt]) -> ([Decl], [Stmt]) -> ([Decl], [Stmt])
combineDeclsAndStmts (a1, b1) (a2, b2) = (a1 ++ a2, b1 ++ b2)
makeInput :: Decl -> Decl
makeInput (Variable _ t x a me) = Variable Input t x a me
makeInput other = error $ "unexpected non-var decl: " ++ (show other)
makeInput (Variable Local t x a me) = Variable Input t x a me
makeInput (Variable Input t x a me) = Variable Input t x a me
makeInput other =
error $ "unexpected non-var or non-input decl: " ++ (show other)
defaultFuncInput :: Decl -> Decl
defaultFuncInput (Variable dir (Implicit sg rs) x a me) =