additional codegen test coverage

- assertions, gen case, and inout
- simplify block codegen
- remove blank lines in tasks with no inputs

test/basic/assert.v

@@ -0,0 +1,8 @@
+module Module(input clock, input clear, input data);
+    wire x, y;
+    assign y = data;
+    assign x = y;
+    task hello;
+        $display("Hello!");
+    endtask
+endmodule