support for constant size casts

src/Convert/Enum.hs

@@ -47,7 +47,7 @@ convertDescription (description @ (Part _ _ _ _ _ _)) =
         -- drop any enum type casts in favor of implicit conversion from the
         -- converted type
         traverseExpr :: Expr -> Expr
-        traverseExpr (Cast (Enum _ _ _) e) = e
+        traverseExpr (Cast (Left (Enum _ _ _)) e) = e
         traverseExpr other = other
 convertDescription other = other
 

src/Convert/Traverse.hs

@@ -226,8 +226,12 @@ traverseNestedExprsM mapper = exprMapper
             e2' <- exprMapper e2
             e3' <- exprMapper e3
             return $ Mux e1' e2' e3'
-        em (Cast       t e) =
-            exprMapper e >>= return . Cast t
+        em (Cast (Left t) e) =
+            exprMapper e >>= return . Cast (Left t)
+        em (Cast (Right e1) e2) = do
+            e1' <- exprMapper e1
+            e2' <- exprMapper e2
+            return $ Cast (Right e1') e2'
         em (Dot e x) =
             exprMapper e >>= \e' -> return $ Dot e' x
         em (Pattern l) = do
@@ -439,8 +443,10 @@ traverseTypesM mapper item =
             types <- mapM fullMapper $ map fst fields
             let idents = map snd fields
             return $ Struct p (zip types idents) r
-        exprMapper (Cast t e) =
-            fullMapper t >>= \t' -> return $ Cast t' e
+        exprMapper (Cast (Left t) e) =
+            fullMapper t >>= \t' -> return $ Cast (Left t') e
+        exprMapper (Cast (Right e1) e2) =
+            return $ Cast (Right e1) e2
         exprMapper other = return other
         declMapper (Parameter  t x    e) =
             fullMapper t >>= \t' -> return $ Parameter  t' x   e

src/Language/SystemVerilog/AST/Expr.hs

@@ -33,7 +33,7 @@ data Expr
     | UniOp   UniOp Expr
     | BinOp   BinOp Expr Expr
     | Mux     Expr Expr Expr
-    | Cast    Type Expr
+    | Cast    (Either Type Expr) Expr
     | Dot     Expr Identifier
     | Pattern [(Maybe Identifier, Expr)]
     deriving (Eq, Ord)
@@ -48,10 +48,14 @@ instance Show Expr where
     show (Concat  l    ) = printf "{%s}"                (commas $ map show l)
     show (UniOp   a b  ) = printf "(%s %s)"    (show a) (show b)
     show (BinOp   o a b) = printf "(%s %s %s)" (show a) (show o) (show b)
-    show (Cast    t e  ) = printf "%s'(%s)"    (show t) (show e)
     show (Dot     e n  ) = printf "%s.%s"      (show e) n
     show (Mux     c a b) = printf "(%s ? %s : %s)" (show c) (show a) (show b)
     show (Call    f l  ) = printf "%s(%s)" f (commas $ map (maybe "" show) l)
+    show (Cast tore e  ) = printf "%s'(%s)" tStr (show e)
+        where
+            tStr = case tore of
+                Left  a -> show a
+                Right a -> show a
     show (Pattern l    ) =
         printf "'{\n%s\n}" (indent $ intercalate ",\n" $ map showPatternItem l)
         where

src/Language/SystemVerilog/Parser/Parse.y

@@ -209,7 +209,7 @@ directive          { Token Spe_Directive _ _ }
 %left  "*" "/" "%"
 %left  "**"
 %right REDUCE_OP "!" "~" "++" "--"
-%left  "(" ")" "[" "]" "."
+%left  "(" ")" "[" "]" "." "'"
 
 
 %%
@@ -250,7 +250,6 @@ CastingType :: { Type }
   | NonIntegerType    { NonInteger    $1                }
   | Signing           { Implicit      $1             [] }
 
-
 Signing :: { Signing }
   : "signed"   { Signed }
   | "unsigned" { Unsigned }
@@ -651,8 +650,9 @@ Expr :: { Expr }
   | "{" Expr "{" Exprs "}" "}"  { Repeat $2 $4 }
   | "{" Exprs "}"               { Concat $2 }
   | Expr "?" Expr ":" Expr      { Mux $1 $3 $5 }
-  | CastingType "'" "(" Expr ")" { Cast ($1         ) $4 }
-  | Identifier  "'" "(" Expr ")" { Cast (Alias $1 []) $4 }
+  | CastingType "'" "(" Expr ")" { Cast (Left            $1) $4 }
+  | Identifier  "'" "(" Expr ")" { Cast (Left $ Alias $1 []) $4 }
+  | Number      "'" "(" Expr ")" { Cast (Right $ Number  $1) $4 }
   | Expr "." Identifier         { Dot $1 $3 }
   | "'" "{" PatternItems "}"    { Pattern $3 }
   -- binary expressions