mirror of https://github.com/zachjs/sv2v.git
refactor parameter binding resolution
- fix type/expr ambiguity for interface and class parameters - check for parameter kind mismatch up front - centralize key logic in ResolveBindings
This commit is contained in:
Zachary Snow
parent
0aa59165a1
commit
13c84e4c7a
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@ -30,6 +30,7 @@ import Data.Maybe (mapMaybe)
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import qualified Data.Map.Strict as Map
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import qualified Data.Set as Set
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import Convert.ResolveBindings (exprToType, resolveBindings)
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import Convert.Scoper
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import Convert.Traverse
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import Language.SystemVerilog.AST
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@ -504,11 +505,13 @@ resolveCSIdent className paramBindings scopeKeys itemName = do
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Decl $ ParamType Parameter x $
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case lookup x' bindings of
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Just (Left t') -> t'
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Just (Right (Ident y)) -> Alias y []
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Just (Right e') ->
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error $ "cannot override type parameter " ++ show x'
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++ " in class " ++ show className
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++ " with expression " ++ show e'
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case exprToType e' of
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Just t' -> t'
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Nothing ->
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error $ "cannot override type parameter "
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++ show x' ++ " in class " ++ show className
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++ " with expression " ++ show e'
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Nothing ->
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if t == UnknownType
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then error $ "required type parameter " ++ show x'
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@ -13,7 +13,6 @@ import Data.Maybe (isJust, isNothing, fromJust)
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import qualified Data.Map.Strict as Map
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import qualified Data.Set as Set
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import Convert.ExprUtils
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import Convert.Traverse
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import Language.SystemVerilog.AST
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@ -241,25 +240,6 @@ isDefaultName m =
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defaultTag :: Identifier
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defaultTag = "_sv2v_default"
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-- attempt to convert an expression to syntactically equivalent type
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exprToType :: Expr -> Maybe Type
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exprToType (Ident x) = Just $ Alias x []
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exprToType (PSIdent y x) = Just $ PSAlias y x []
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exprToType (CSIdent y p x) = Just $ CSAlias y p x []
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exprToType (Range e NonIndexed r) =
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case exprToType e of
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Nothing -> Nothing
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Just t -> Just $ tf (rs ++ [r])
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where (tf, rs) = typeRanges t
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exprToType (Bit e i) =
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case exprToType e of
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Nothing -> Nothing
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Just t -> Just $ tf (rs ++ [r])
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where
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(tf, rs) = typeRanges t
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r = (simplify $ BinOp Sub i (RawNum 1), RawNum 0)
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exprToType _ = Nothing
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-- checks where a type is sufficiently resolved to be substituted
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isSimpleType :: Type -> Bool
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isSimpleType typ =
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@ -352,21 +332,11 @@ convertModuleItemM info (orig @ (Instance m bindings x r p)) =
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Map.toList resolvedTypesWithDecls
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resolveType :: Identifier -> Maybe Type -> (Type, (IdentSet, [Decl]))
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resolveType paramName defaultType =
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case (Map.lookup paramName bindingsMap, defaultType) of
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(Nothing, Just t) -> (t, (Set.empty, []))
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(Nothing, Nothing) ->
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error $ "instantiation " ++ show orig ++
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" is missing a type parameter: " ++ paramName
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(Just (Left t), _) -> prepareTypeExprs x paramName t
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(Just (Right e), _) ->
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-- Some types are parsed as expressions because of the
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-- ambiguities of defined type names.
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case exprToType e of
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Just t -> prepareTypeExprs x paramName t
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Nothing ->
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error $ "instantiation " ++ show orig
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++ " has expr " ++ show e
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++ " for type param: " ++ paramName
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case Map.lookup paramName bindingsMap of
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Nothing -> (t, (Set.empty, []))
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where Just t = defaultType
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Just b -> prepareTypeExprs x paramName t
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where Left t = b
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-- leave only the normal expression params behind
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isParamType = flip Map.member maybeTypeMap
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@ -1,61 +1,70 @@
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{-# LANGUAGE TupleSections #-}
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{- sv2v
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- Author: Zachary Snow <zach@zachjs.com>
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-
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- Conversion for `.*` and unnamed bindings
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-
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- While positional bindings need not be converted, resolving them here
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- simplifies downstream conversions.
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- simplifies downstream conversions. This conversion is also responsible for
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- performing some basic validation and resolving the ambiguity between types
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- and expressions in parameter binding contexts.
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-}
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module Convert.ResolveBindings (convert) where
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module Convert.ResolveBindings
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( convert
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, exprToType
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, resolveBindings
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) where
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import Control.Monad.Writer.Strict
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import qualified Data.Map.Strict as Map
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import Convert.ExprUtils (simplify)
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import Convert.Traverse
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import Language.SystemVerilog.AST
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type Ports = Map.Map Identifier ([Identifier], [Identifier])
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type Parts = Map.Map Identifier ([(Identifier, Bool)], [Identifier])
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convert :: [AST] -> [AST]
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convert =
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traverseFiles
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(collectDescriptionsM collectPortsM)
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(collectDescriptionsM collectPartsM)
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(traverseDescriptions . traverseModuleItems . mapInstance)
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collectPortsM :: Description -> Writer Ports ()
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collectPortsM (Part _ _ _ _ name ports items) =
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collectPartsM :: Description -> Writer Parts ()
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collectPartsM (Part _ _ _ _ name ports items) =
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tell $ Map.singleton name (params, ports)
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where params = parameterNames items
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collectPortsM _ = return ()
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where params = parameterInfos items
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collectPartsM _ = return ()
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-- given a list of module items, produces the parameter names in order
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parameterNames :: [ModuleItem] -> [Identifier]
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parameterNames =
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-- given a list of module items, produces the parameters in order
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parameterInfos :: [ModuleItem] -> [(Identifier, Bool)]
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parameterInfos =
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execWriter . mapM (collectNestedModuleItemsM $ collectDeclsM collectDeclM)
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where
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collectDeclM :: Decl -> Writer [Identifier] ()
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collectDeclM (Param Parameter _ x _) = tell [x]
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collectDeclM (ParamType Parameter x _) = tell [x]
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collectDeclM :: Decl -> Writer [(Identifier, Bool)] ()
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collectDeclM (Param Parameter _ x _) = tell [(x, False)]
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collectDeclM (ParamType Parameter x _) = tell [(x, True)]
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collectDeclM _ = return ()
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mapInstance :: Ports -> ModuleItem -> ModuleItem
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mapInstance modulePorts (Instance m paramBindings x rs portBindings) =
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mapInstance :: Parts -> ModuleItem -> ModuleItem
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mapInstance parts (Instance m paramBindings x rs portBindings) =
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-- if we can't find it, just skip :(
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if maybeModuleInfo == Nothing
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if maybePartInfo == Nothing
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then Instance m paramBindings x rs portBindings
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else Instance m paramBindings' x rs portBindings'
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where
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maybeModuleInfo = Map.lookup m modulePorts
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Just (paramNames, portNames) = maybeModuleInfo
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maybePartInfo = Map.lookup m parts
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Just (paramInfos, portNames) = maybePartInfo
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paramNames = map fst paramInfos
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msg :: String -> String
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msg = flip (++) $ " in instance " ++ show x ++ " of " ++ show m
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paramBindings' = resolveBindings (msg "parameter overrides") paramNames
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paramBindings
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portBindings' = resolveBindings (msg "port connections") portNames
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$ concatMap expandStar portBindings
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paramBindings' = map checkParam $
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resolveBindings (msg "parameter overrides") paramNames paramBindings
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portBindings' = resolveBindings (msg "port connections") portNames $
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concatMap expandStar portBindings
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expandStar :: PortBinding -> [PortBinding]
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expandStar ("*", Nil) =
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@ -64,4 +73,53 @@ mapInstance modulePorts (Instance m paramBindings x rs portBindings) =
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where alreadyBound = map fst portBindings
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expandStar other = [other]
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-- ensures parameter and binding kinds (type vs. expr) match
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checkParam :: ParamBinding -> ParamBinding
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checkParam (paramName, Right e) =
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(paramName, ) $
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if isType
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then case exprToType e of
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Nothing -> kindMismatch paramName "a type" "expression" e
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Just t -> Left t
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else Right e
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where Just isType = lookup paramName paramInfos
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checkParam (paramName, Left t) =
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if isType
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then (paramName, Left t)
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else kindMismatch paramName "an expression" "type" t
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where Just isType = lookup paramName paramInfos
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kindMismatch :: Show k => Identifier -> String -> String -> k -> a
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kindMismatch paramName expected actual value =
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error $ msg ("parameter " ++ show paramName)
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++ " expects " ++ expected
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++ ", but was given " ++ actual
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++ ' ' : show value
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mapInstance _ other = other
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-- attempt to convert an expression to syntactically equivalent type
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exprToType :: Expr -> Maybe Type
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exprToType (Ident x) = Just $ Alias x []
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exprToType (PSIdent y x) = Just $ PSAlias y x []
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exprToType (CSIdent y p x) = Just $ CSAlias y p x []
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exprToType (Range e NonIndexed r) = do
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(tf, rs) <- fmap typeRanges $ exprToType e
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Just $ tf (rs ++ [r])
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exprToType (Bit e i) = do
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(tf, rs) <- fmap typeRanges $ exprToType e
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let r = (simplify $ BinOp Sub i (RawNum 1), RawNum 0)
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Just $ tf (rs ++ [r])
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exprToType _ = Nothing
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type Binding t = (Identifier, t)
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-- give a set of bindings explicit names
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resolveBindings :: String -> [Identifier] -> [Binding t] -> [Binding t]
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resolveBindings _ _ [] = []
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resolveBindings location available bindings =
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if length available < length bindings then
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error $ "too many bindings specified for " ++ location
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else if null $ fst $ head bindings then
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zip available $ map snd bindings
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else
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bindings
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@ -29,7 +29,6 @@ module Language.SystemVerilog.AST
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, exprToLHS
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, lhsToExpr
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, shortHash
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, resolveBindings
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) where
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import Text.Printf (printf)
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@ -85,15 +84,3 @@ shortHash :: (Show a) => a -> String
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shortHash x =
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take 5 $ printf "%05X" val
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where val = hash $ show x
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type Binding t = (Identifier, t)
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-- give a set of bindings explicit names
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resolveBindings :: String -> [Identifier] -> [Binding t] -> [Binding t]
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resolveBindings _ _ [] = []
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resolveBindings location available bindings =
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if length available < length bindings then
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error $ "too many bindings specified for " ++ location
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else if null $ fst $ head bindings then
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zip available $ map snd bindings
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else
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bindings
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@ -0,0 +1,74 @@
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class C #(
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parameter PARAM_E = 1,
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parameter type PARAM_T = logic
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);
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localparam E = PARAM_E * $bits(PARAM_T);
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localparam type T = PARAM_T [PARAM_E - 1:0];
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endclass
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package P;
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localparam E = 2;
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localparam type T = logic [E - 1:0];
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endpackage
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module M #(
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parameter DELAY,
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parameter PREFIX,
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parameter SUFFIX,
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parameter E,
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parameter type T
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);
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initial #DELAY $display("M: %sE%s=%0d $bits(%sT%s)=%0d",
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PREFIX, SUFFIX, E, PREFIX, SUFFIX, $bits(T));
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endmodule
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interface I #(
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parameter DELAY,
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parameter PREFIX,
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parameter SUFFIX,
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parameter E,
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parameter type T
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);
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initial #DELAY $display("I: %sE%s=%0d $bits(%sT%s)=%0d",
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PREFIX, SUFFIX, E, PREFIX, SUFFIX, $bits(T));
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endinterface
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module top;
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parameter FLAG = 1;
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localparam E = 3;
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localparam type T = logic [E * 2 - 1:0];
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`define TEST(D, prefix) \
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if (FLAG) begin \
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localparam the_expr = prefix``E; \
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localparam type the_type = prefix``T; \
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initial begin \
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#(D * 10); \
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$display(`"prefix``E = %0d %0d`", the_expr, prefix``E); \
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$display(`"$bits(prefix``E) = %0d %0d`", $bits(the_expr), $bits(prefix``E)); \
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$display(`"$bits(prefix``T) = %0d %0d`", $bits(the_type), $bits(prefix``T)); \
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$display(`"$left(prefix``E) = %0d`", $left(prefix``E)); \
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$display(`"$left(prefix``T) = %0d`", $left(prefix``T)); \
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$display(`"prefix``E'('z) = %b`", prefix``E'('z)); \
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$display(`"prefix``T'('z) = %b`", prefix``T'('z)); \
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end \
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I #(D*10+1, `"prefix`", "", prefix``E, prefix``T) i1(); \
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M #(D*10+2, `"prefix`", "", prefix``E, prefix``T) m1(); \
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I #(D*10+3, `"prefix`", "[6]", prefix``E[6], prefix``T[6]) i2(); \
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M #(D*10+4, `"prefix`", "[6]", prefix``E[6], prefix``T[6]) m2(); \
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I #(D*10+5, `"prefix`", "[6:0]", prefix``E[6:0], prefix``T[6:0]) i3(); \
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M #(D*10+6, `"prefix`", "[6:0]", prefix``E[6:0], prefix``T[6:0]) m3(); \
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end
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`TEST(0, )
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`TEST(1, P::)
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`TEST(2, C#()::)
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`TEST(3, C#(E, T)::)
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`TEST(4, C#(P::E, P::T)::)
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`TEST(5, C#(C#(E, T)::E, C#(E, T)::T)::)
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`TEST(6, C#(E[1], T[2])::)
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`TEST(7, C#(E[2:0], T[2:0])::)
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endmodule
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@ -0,0 +1,50 @@
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module MI;
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parameter KIND = "";
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parameter DELAY = 0;
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parameter PREFIX = "";
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parameter SUFFIX = "";
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parameter E = 1;
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parameter T = 1;
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initial #DELAY $display("%s: %sE%s=%0d $bits(%sT%s)=%0d",
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KIND, PREFIX, SUFFIX, E, PREFIX, SUFFIX, T);
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endmodule
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module top;
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parameter FLAG = 1;
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`define TEST(D, prefix, eval, tval, leftval) \
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if (FLAG) begin \
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localparam [eval:1] ez = 1'sbz; \
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localparam [tval:1] tz = 1'sbz; \
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initial begin \
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#(D * 10); \
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$display(`"prefix``E = %0d %0d`", eval, eval); \
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$display(`"$bits(prefix``E) = %0d %0d`", 32, 32); \
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$display(`"$bits(prefix``T) = %0d %0d`", tval, tval); \
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$display(`"$left(prefix``E) = %0d`", 31); \
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$display(`"$left(prefix``T) = %0d`", leftval); \
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$display(`"prefix``E'('z) = %b`", ez); \
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$display(`"prefix``T'('z) = %b`", tz); \
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end \
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MI #("I", D*10+1, `"prefix`", "", eval, tval) i1(); \
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MI #("M", D*10+2, `"prefix`", "", eval, tval) m1(); \
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MI #("I", D*10+3, `"prefix`", "[6]", (eval >> 6) & 1'b1, tval*6) i2(); \
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MI #("M", D*10+4, `"prefix`", "[6]", (eval >> 6) & 1'b1, tval*6) m2(); \
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MI #("I", D*10+5, `"prefix`", "[6:0]", eval & 7'h7f, tval * 7) i3(); \
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MI #("M", D*10+6, `"prefix`", "[6:0]", eval & 7'h7f, tval * 7) m3(); \
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end
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`define TEST_C(D, prefix, efac, tfac) \
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`TEST(D, prefix, (efac)*(tfac), (tfac)*(efac), (efac)-1)
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`TEST(0, , 3, 6, 5)
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`TEST(1, P::, 2, 2, 1)
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`TEST_C(2, C#()::, 1, 1)
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`TEST_C(3, C#(E, T)::, 3, 6)
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`TEST_C(4, C#(P::E, P::T)::, 2, 2)
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`TEST_C(5, C#(C#(E, T)::E, C#(E, T)::T)::, 18, 18)
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`TEST_C(6, C#(E[1], T[2])::, 1, 12)
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`TEST_C(7, C#(E[2:0], T[2:0])::, 3, 18)
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endmodule
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@ -1,8 +1,8 @@
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// pattern: parameter "P" in instance "intf" of "Interface" expects an expression, but was given type logic
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interface Interface;
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parameter T = 0;
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logic [T-1:0] x;
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parameter P = 0;
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logic [P-1:0] x;
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endinterface
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module top;
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Interface #(logic) intf();
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endmodule
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@ -1,8 +1,8 @@
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// pattern: parameter "P" in instance "intf" of "Interface" expects a type, but was given expression 1
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interface Interface;
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parameter type T;
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T x;
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parameter type P;
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P x;
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endinterface
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module top;
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Interface #(1) intf();
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endmodule
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@ -0,0 +1,8 @@
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// pattern: parameter "P" in instance "mod" of "Module" expects an expression, but was given type logic
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module Module;
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parameter P = 0;
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logic [P-1:0] x;
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endmodule
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module top;
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Module #(logic) mod();
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endmodule
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@ -0,0 +1,8 @@
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// pattern: parameter "P" in instance "mod" of "Module" expects a type, but was given expression 1
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module Module;
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parameter type P;
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P x;
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endmodule
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module top;
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Module #(1) mod();
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endmodule
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