mirror of https://github.com/zachjs/sv2v.git
9 lines
196 B
Systemverilog
9 lines
196 B
Systemverilog
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// pattern: unknown bindings "w", "z" specified for port connections in instance "e" of "example"
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module example(
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input x, y
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);
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endmodule
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module top;
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example e(.w(1), .z(1'b0));
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endmodule
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