mirror of https://github.com/zachjs/sv2v.git
8 lines
171 B
Verilog
8 lines
171 B
Verilog
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module top;
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localparam X = $clog2(100);
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localparam Y = X + 1;
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localparam Z = Y + 1;
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localparam V = Y + 1;
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initial $display("%0d %0d", V, X);
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endmodule
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