mirror of https://github.com/zachjs/sv2v.git
12 lines
238 B
Systemverilog
12 lines
238 B
Systemverilog
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module top;
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integer x = 0;
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initial
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do begin
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$display("hi %0d", x);
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x++;
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if (x == 2)
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continue;
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$display("step");
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end while (0 < x && x < 3);
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endmodule
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