mirror of https://github.com/zachjs/sv2v.git
20 lines
264 B
Systemverilog
20 lines
264 B
Systemverilog
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module top;
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typedef struct packed {
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logic f1;
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logic f2;
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} T;
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T a[1:0];
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T b[1:0];
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T c[1:0], d[1:0];
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T e[1:0], f[1:0], g;
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T h, i[1:0];
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T j;
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struct packed {
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logic f1;
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logic f2;
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} k;
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endmodule
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