mirror of https://github.com/zachjs/sv2v.git
16 lines
231 B
Systemverilog
16 lines
231 B
Systemverilog
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module top;
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logic x = 1;
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foo f(x);
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endmodule
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interface foo(input logic x);
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bar a(x);
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bar b(~x);
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endinterface
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interface bar(input logic x);
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initial begin
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$display("bar got %b", x);
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end
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endinterface
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