mirror of https://github.com/zachjs/sv2v.git
27 lines
742 B
Systemverilog
27 lines
742 B
Systemverilog
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`define DUMP(L) initial $display(`"L %0d`", $bits(i));
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module top;
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genvar i;
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for (i = 0; i < 1; i = 1) begin
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`DUMP(A)
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if (1) begin
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localparam [9:0] i = 1;
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`DUMP(B)
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if (1) begin
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genvar i;
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for (i = 0; i < 1; i = 1) begin
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`DUMP(C)
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if (1) begin
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localparam [5:0] i = 1;
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`DUMP(D)
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if (1) begin
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genvar i;
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for (i = 0; i < 1; i = 1)
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`DUMP(E)
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end
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end
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end
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end
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end
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end
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endmodule
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