mirror of https://github.com/zachjs/sv2v.git
28 lines
383 B
Verilog
28 lines
383 B
Verilog
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module top;
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initial begin
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$display(1);
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$display(2);
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$display(3);
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end
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initial begin
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$display(1);
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$display(2);
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$display(3);
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end
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initial begin
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$display(1);
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$display(2);
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$display(3);
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end
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initial begin
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$display(1);
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$display(2);
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$display(3);
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end
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endmodule
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