mirror of https://github.com/zachjs/sv2v.git
11 lines
226 B
Systemverilog
11 lines
226 B
Systemverilog
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interface Interface1;
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logic x;
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modport ModportA (input x);
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modport ModportB (output x);
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endinterface
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interface Interface2;
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logic x;
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modport ModportA (input x);
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modport ModportB (output x);
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endinterface
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