sv2v/src/Convert/FuncRet.hs

{- sv2v
 - Author: Zachary Snow <zach@zachjs.com>
 -
 - Conversion which makes function `logic` and `reg` return types implicit
 -}

module Convert.FuncRet (convert) where

import Convert.Traverse
import Language.SystemVerilog.AST

convert :: AST -> AST
convert = traverseDescriptions $ traverseModuleItems convertFunction

convertFunction :: ModuleItem -> ModuleItem
convertFunction (MIPackageItem (Function ml (Reg r) f decls stmts)) =
    MIPackageItem $ Function ml (Implicit r) f decls stmts
convertFunction (MIPackageItem (Function ml (Logic r) f decls stmts)) =
    MIPackageItem $ Function ml (Implicit r) f decls stmts
convertFunction other = other