mirror of https://github.com/zachjs/sv2v.git
9 lines
213 B
Systemverilog
9 lines
213 B
Systemverilog
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module top;
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localparam a = "abcd";
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localparam b = 64'("abcd");
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logic [3:0][7:0] c = "abcd";
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integer d = b; // truncate
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localparam e = 32'("abcd");
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`include "string_byte_order.vh"
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endmodule
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