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15 lines
320 B
Verilog
15 lines
320 B
Verilog
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module ExampleA;
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localparam [0:0] A = 1;
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localparam [0:0] B = 0;
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reg x = A;
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initial $display("ExampleA: x=%b, A=%b, B=%b", x, A, B);
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endmodule
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module ExampleB;
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localparam [0:0] A = 0;
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localparam [0:0] B = 1;
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reg x = A;
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initial $display("ExampleB: x=%b, A=%b, B=%b", x, A, B);
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endmodule
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