litghost f61ccd1f2a Merge pull request #549 from litghost/accelerate_post_processing ... Refactor 074 post-processing		2019-01-18 07:09:59 -08:00
..
__init__.py	Generate tile types, site types, tilegrid, tileconn for entire part.	2018-09-26 22:37:33 -07:00
bitfilter.py	make format.	2019-01-17 18:45:00 -08:00
bitsmaker.py	tilegrid iob: factor out generic code	2018-12-18 13:20:57 -08:00
bitstream.py	partgen py utilities (gen_part_base_addrs)	2019-01-08 11:44:24 +01:00
connections.py	Add ROI annotations and update some missing tilegrid changes.	2018-10-05 18:26:24 -07:00
db.py	db.py: comment	2018-12-10 14:56:23 -08:00
fasm_assembler.py	Accumulate all missing features, rather than stopping on first failure.	2019-01-14 11:37:45 -08:00
fasm_disassembler.py	Assorted fixes.	2018-10-22 09:08:34 -07:00
grid.py	Create design.json that describes roi harness boundry, used for VPR arch def.	2018-10-23 15:16:34 -07:00
lib.py	Really fix find_origin_coordinate	2018-10-12 07:03:37 -07:00
node_lookup.py	make format.	2019-01-17 21:48:34 -08:00
roi.py	Run make format.	2018-10-22 12:32:42 -07:00
segmaker.py	add_site_group_zero() allow unused zero_val for empty tile	2019-01-08 15:49:30 +01:00
segment_map.py	Run make format.	2018-10-19 16:19:22 -07:00
site_type.py	Add methods to library.	2018-09-27 13:17:01 -07:00
tile.py	Run make format.	2018-10-19 16:19:22 -07:00
tile_segbits.py	Fix fasm_assembler for partial tile usage.	2018-10-30 11:08:24 -07:00
util.py	Make Python code testable.	2019-01-10 19:54:59 -08:00
verilog.py	101-bram-config: READ/WRITE_WIDTH SRVAL/INIT parity tweaks	2018-10-29 15:29:27 -07:00