mirror of https://github.com/openXC7/prjxray.git
102 lines
3.9 KiB
Makefile
102 lines
3.9 KiB
Makefile
.PRECIOUS: harness_impl.dcp %_impl.dcp %.bit
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# Top-level target for generating a programmable bitstream. Given a .fasm
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# file, calling make with the .fasm extension replaced with _hand_crafted.bit
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# will generate a bitstream that includes both the harness and the .fasm design
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# ready for programming to a board. For example,
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# 'make inv_hand_crafted.bit' will generate a bitstream that includes the
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# design from roi_noninv.fasm.
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%_hand_crafted.bit: init_sequence.bit %_no_headers.bin final_sequence.bin
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cat $^ > $@
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%_no_headers.bin: %_patched.bin
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# WARNING: these values need to be tweaked if anything about the
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# Vivado-generated design changes.
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xxd -p -s 0x18 $< | xxd -r -p - $@
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%_patched.bin: %_roi_partial.frm harness.bit
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${XRAY_TOOLS_DIR}/xc7patch \
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--part_file ${XRAY_PART_YAML} \
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--bitstream_file harness.bit \
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--frm_file $< \
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--output_file $@
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# xc7patch currently only generates the actual frame writes which is
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# insufficient to program a device. Grab the initialization and finalization
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# sequences from the harness bitstream so they can be tacked on to the
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# xc7patch-generated bitstream to create a programmable bitstream.
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#
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# The offsets used below were determined by manually inspecting
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# harness.bit with a hex editor. init_sequence.bit is the beginning of
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# the file until just before the actual frame data is sent via a write to FDRI.
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# final_sequence.bin is from just after the frame data write to the end of the
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# file. Note that final_sequence.bin normally includes at least one CRC check.
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# The sed command replaces any CRC checks with a Reset CRC command which is the
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# same behavior as setting BITSTREAM.GENERAL.CRC to Disabled. These offset
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# should not change unless you alter the bitstream format used (i.e. setting
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# BITSTREAM.GENERAL.DEBUGBITSTREAM or BITSTREAM.GENERAL.PERFRAMECRC to YES).
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init_sequence.bit: harness.bit
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# WARNING: these values need to be tweaked if anything about the
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# Vivado-generated design changes.
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xxd -p -l 0x147 $< | xxd -r -p - $@
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final_sequence.bin: harness.bit
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# WARNING: these values need to be tweaked if anything about the
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# Vivado-generated design changes.
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xxd -p -s 0x216abf $< | \
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tr -d '\n' | \
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sed -e 's/30000001.\{8\}/3000800100000007/g' | \
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fold -w 40 | \
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xxd -r -p - $@
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# Generate a suitable harness by using Vivado's partial reconfiguration
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# feature. inv.v is used as a sample reconfiguration design as one is
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# required to generate a partial reconfiguration design.
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harness_synth.dcp: harness_synthesize.tcl harness.v
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vivado -mode batch -source harness_synthesize.tcl
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harness_impl.dcp: harness_synth.dcp inv_synth.dcp harness_implement.tcl
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vivado -mode batch -source harness_implement.tcl
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# Synthesize an ROI design
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%_synth.dcp: %.v roi_synthesize.tcl
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vivado -mode batch -source roi_synthesize.tcl -tclargs $< $@
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# Implement an ROI design
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%_impl.dcp: %_synth.dcp harness_impl.dcp roi_implement.tcl
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vivado -mode batch -source roi_implement.tcl -tclargs $< $@
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# Generate bitstreams from an implemented design. Two bitstreams are
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# generated: one containing a complete design including the harness (.bit) and
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# one that only contains the frames that implement the ROI design
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# (_roi_partial.bit).
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%.bit: %_impl.dcp write_bitstream.tcl
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vivado -mode batch -source write_bitstream.tcl -tclargs $< $@
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%_roi_partial.bit: %.bit ;
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# Conversions between various formats.
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%.bits: %.bit
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${XRAY_BITREAD} -z -y -o $@ $<
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%.segp: %.bits
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${XRAY_SEGPRINT} -zd $< > $@
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%.fasm: %.segp
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${XRAY_DIR}/tools/segprint2fasm.py $< $@
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%.frm: %.fasm
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${XRAY_DIR}/tools/fasm2frame.py $< $@
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# This format is a human-readable representation of the configuration packets
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# used to interact with 7-series chips over JTAG.
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%.packets: %.bit
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${XRAY_TOOLS_DIR}/bittool list_config_packets $< > $@
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clean:
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rm -rf vivado*.log vivado_*.str vivado*.jou design *.bits *.dcp *.bit design.txt .Xil
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rm -rf *.frm *.segp *.packets *.bin *.fasm
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rm -rf hd_visual
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.PHONY: clean
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