mirror of https://github.com/openXC7/prjxray.git
116 lines
3.4 KiB
Tcl
116 lines
3.4 KiB
Tcl
# Copyright (C) 2017-2020 The Project X-Ray Authors
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#
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# Use of this source code is governed by a ISC-style
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# license that can be found in the LICENSE file or at
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# https://opensource.org/licenses/ISC
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#
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# SPDX-License-Identifier: ISC
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source "$::env(XRAY_DIR)/utils/utils.tcl"
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proc make_manual_routes {filename} {
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puts "MANROUTE: Loading routes from $filename"
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set fp [open $filename r]
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foreach line [split [read $fp] "\n"] {
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if {$line eq ""} {
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continue
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}
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puts "MANROUTE: Line: $line"
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# Parse the line
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set fields [split $line " "]
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set net_name [lindex $fields 0]
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set wire_name [lindex $fields 1]
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# Check if that net exist
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if {[get_nets $net_name] eq ""} {
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puts "MANROUTE: net $net_name does not exist"
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continue
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}
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# Make the route
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set status [route_via $net_name [list $wire_name] 0]
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# Failure, skip manual routing of this net
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if { $status != 1 } {
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puts "MANROUTE: Manual routing failed!"
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set net [get_nets $net_name]
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set_property -quiet FIXED_ROUTE "" $net
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set_property IS_ROUTE_FIXED 0 $net
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continue
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}
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puts "MANROUTE: Success!"
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}
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}
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create_project -force -part $::env(XRAY_PART) design design
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read_verilog top.v
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synth_design -top top
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set_property CFGBVS VCCO [current_design]
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set_property CONFIG_VOLTAGE 3.3 [current_design]
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set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design]
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create_clock -period 10.00 [get_ports clkin1*]
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create_clock -period 10.00 [get_ports clkin2*]
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# Disable MMCM frequency etc sanity checks
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set_property IS_ENABLED 0 [get_drc_checks {PDRC-29}]
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set_property IS_ENABLED 0 [get_drc_checks {PDRC-30}]
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set_property IS_ENABLED 0 [get_drc_checks {AVAL-50}]
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set_property IS_ENABLED 0 [get_drc_checks {AVAL-53}]
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set_property IS_ENABLED 0 [get_drc_checks {REQP-126}]
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# PLL
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set_property IS_ENABLED 0 [get_drc_checks {PDRC-43}]
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set_property IS_ENABLED 0 [get_drc_checks {REQP-161}]
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set_property IS_ENABLED 0 [get_drc_checks {AVAL-78}]
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set_property IS_ENABLED 0 [get_drc_checks {UCIO-1}]
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set_property IS_ENABLED 0 [get_drc_checks {NSTD-1}]
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place_design
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write_checkpoint -force design_placed.dcp
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make_manual_routes routes.txt
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write_checkpoint -force design_pre_route.dcp
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route_design -directive Quick -preserve
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set unrouted_nets [get_nets -filter {ROUTE_STATUS!="ROUTED"}]
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if {[llength $unrouted_nets] ne 0} {
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puts "MANROUTE: Got unrouted nets: $unrouted_nets"
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puts "MANROUTE: Ripping up and starting again with no fixed routes"
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route_design -unroute
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set fixed_nets [get_nets -filter {IS_ROUTE_FIXED==1}]
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if {[llength $fixed_nets] ne 0} {
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set_property FIXED_ROUTE "" $fixed_nets
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set_property IS_ROUTE_FIXED 0 $fixed_nets
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}
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route_design -directive Quick
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}
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write_checkpoint -force design.dcp
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write_bitstream -force design.bit
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set fp [open params.json "w"]
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puts $fp "\["
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foreach cell [get_cells -hierarchical -filter {REF_NAME == PLLE2_ADV}] {
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puts $fp " {"
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puts $fp " \"tile\": \"[get_tiles -of [get_sites -of $cell]]\","
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puts $fp " \"site\": \"[get_sites -of $cell]\","
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puts $fp " \"params\": {"
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foreach prop [list_property $cell] {
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puts $fp " \"$prop\": \"[get_property $prop $cell]\","
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}
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puts $fp " }"
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puts $fp " },"
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}
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puts $fp "\]"
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close $fp
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