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Tomasz Michalak e2b88458e8 minitest: Add csv generation script 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 		2019-02-18 08:14:21 +01:00
..
DRIVE.tcl iob: move minitest to fuzzer 2018-12-10 17:30:06 -08:00
IOSTANDARD.tcl iob: move minitest to fuzzer 2018-12-10 17:30:06 -08:00
Makefile minitest: Add csv generation script 2019-02-18 08:14:21 +01:00
PULLTYPE.tcl iob: move minitest to fuzzer 2018-12-10 17:30:06 -08:00
README.md minitest: Add csv generation script 2019-02-18 08:14:21 +01:00
SLEW.tcl iob: move minitest to fuzzer 2018-12-10 17:30:06 -08:00
compare.py minitest: Add csv generation script 2019-02-18 08:14:21 +01:00
diff.mk iob: move minitest to fuzzer 2018-12-10 17:30:06 -08:00
diff_tcl.mk iob: move minitest to fuzzer 2018-12-10 17:30:06 -08:00
generate.tcl minitest: Add csv generation script 2019-02-18 08:14:21 +01:00
params.csv minitest: Add csv generation script 2019-02-18 08:14:21 +01:00
runme.sh minitest: Add csv generation script 2019-02-18 08:14:21 +01:00
runme.tcl iob: move minitest to fuzzer 2018-12-10 17:30:06 -08:00
runme_tcl.sh introduce vivado wrapper 2018-12-28 19:05:49 +01:00
sweep.tcl iob: move minitest to fuzzer 2018-12-10 17:30:06 -08:00
tcl.v iob: move minitest to fuzzer 2018-12-10 17:30:06 -08:00
template.tcl iob: move minitest to fuzzer 2018-12-10 17:30:06 -08:00
top.py minitest: Add csv generation script 2019-02-18 08:14:21 +01:00
top.v iob: move minitest to fuzzer 2018-12-10 17:30:06 -08:00

README.md

PULLTYPE

PULLTYPE 38_98 39_97 39_97 NONE X KEEPER X X PULLDOWN PULLUP X X

DRIVE

Drive strength depends on current IOSTANDARD, e.g.

LVCMOS18 DRIVE 38_64 38_66 38_72 38_74 39_65 39_73 4 X X X 8 X X X 12 X X X 16 X X X 24 X X X

LVCMOS25 DRIVE 38_64 38_66 38_72 38_74 39_65 39_73 4 X X X 8 X
12
16 X X X

LVCMOS33 DRIVE 38_64 38_66 38_72 38_74 39_65 39_73 4 X X X 8 X X X 12 X X X 16 X X X

The minitest contains a csv target which generates a csv with differences across all LVCMOS and LVTTL standards for all supported DRIVE strengths and both slew rates.

IOSTANDARD

Effects bits, TBD exactly how Sample output:

diff LVCMOS33.bits LVTTL.bits < bit_00020026_006_00

bit_00020026_006_08

diff LVCMOS33.bits PCI33_3.bits < bit_00020026_006_02 < bit_00020026_006_18 < bit_00020026_006_22

bit_00020026_006_10 bit_00020026_006_16 bit_00020026_006_20 bit_00020027_006_11 bit_00020027_006_15