mirror of https://github.com/openXC7/prjxray.git
30 lines
861 B
Tcl
30 lines
861 B
Tcl
source "$::env(XRAY_DIR)/utils/utils.tcl"
|
|
|
|
proc run {} {
|
|
create_project -force -part $::env(XRAY_PART) design design
|
|
read_verilog top.v
|
|
synth_design -top top
|
|
|
|
set_property CFGBVS VCCO [current_design]
|
|
set_property CONFIG_VOLTAGE 3.3 [current_design]
|
|
set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design]
|
|
|
|
# Disable MMCM frequency etc sanity checks
|
|
set_property IS_ENABLED 0 [get_drc_checks {PDRC-29}]
|
|
set_property IS_ENABLED 0 [get_drc_checks {PDRC-30}]
|
|
set_property IS_ENABLED 0 [get_drc_checks {AVAL-50}]
|
|
set_property IS_ENABLED 0 [get_drc_checks {AVAL-53}]
|
|
set_property IS_ENABLED 0 [get_drc_checks {REQP-126}]
|
|
# PLL
|
|
set_property IS_ENABLED 0 [get_drc_checks {REQP-161}]
|
|
|
|
|
|
place_design
|
|
route_design
|
|
|
|
write_checkpoint -force design.dcp
|
|
write_bitstream -force design.bit
|
|
}
|
|
|
|
run
|