prjxray/fuzzers/030-iob18
Dr Jonathan Richard Robert Kimmitt 88f6f61d10 virtex7: 030-iob18 process_rdb — guard the visited-iostandards merge
Failed in dbfixup.py:153 add_tag_bits (AssertionError) because the
process_rdb name-harmonisation loop folded two distinct-bit Y1 IN
groups onto a single feature name. On Virtex-7 IOB_Y1 LVCMOS*.IN
has bits {38_00,39_01} but SSTL*.IN has only {38_00}; the visited-
iostandard logic forced both onto 'LVCMOS18_SSTL12_SSTL135_SSTL15.IN'
(driven by the Y0 grouping where they happened to share bits),
emitting two contradictory db lines that dbfixup can't merge.

(The existing filter_negbits already expects the un-merged name
IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN, confirming the merge is wrong
here.) kintex7's Y1 LVCMOS and SSTL share bits, so it never hits
this case.

Fix: require identical bits before adopting a visited name; gate
via XRAY_DATABASE == virtex7 so kintex7's behaviour is provably
unchanged. Adds 'import os' for the env check.

Verified: no duplicate tags; Y1 splits correctly into
LVCMOS12_LVCMOS15_LVCMOS18.IN + SSTL12_SSTL135_SSTL15.IN.

Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
2026-05-27 14:27:08 +01:00
..
Makefile 030-iob18: add issue link to hack used in Makefile 2024-01-08 14:00:21 +07:00
README.md 030-iob18/README.md: explain about the fuzzer 2024-01-08 14:00:20 +07:00
bits.dbf add support for the kintex high performance banks 2024-01-08 14:00:20 +07:00
check_results.py update copyright year for io*18 fuzzers 2024-01-08 14:00:20 +07:00
generate.py segbits_hclk_ioi: fix missing ONLY_DIFF_IN_USE 2024-10-25 09:41:21 +07:00
generate.tcl update copyright year for io*18 fuzzers 2024-01-08 14:00:20 +07:00
hclk_bits.dbf add support for the kintex high performance banks 2024-01-08 14:00:20 +07:00
iostandards.py add support for the kintex high performance banks 2024-01-08 14:00:20 +07:00
process_rdb.py virtex7: 030-iob18 process_rdb — guard the visited-iostandards merge 2026-05-27 14:27:08 +01:00
tag_groups.txt add support for the kintex high performance banks 2024-01-08 14:00:20 +07:00
top.py 030-iob18: fix Vref conflict warnigns by assigning the correct Vref 2024-01-08 14:00:21 +07:00
write_io_banks.tcl write_io_banks.tcl: use a reliable way to distinguish high performance banks 2024-01-08 14:00:21 +07:00

README.md

IOB18 Fuzzer

This fuzzer solves the bits related to the IO pads in the high performance banks, which are present in most of the Kintex and Virtex devices (a notable exception are K420T and K480T) using bank numbers of 30 and above.

These banks have a maximum voltage of 1.8V which is the reason why many of the BEL names end in 18 (as opposed to 33 for the high range banks, which run on a maximum voltage of 3.3V).

Currently the focus is on supporting the most used IO standards; On most boards, the high performance banks are connected to DDR3 memory and this mandates the support of single ended and differential SSTL15. Of course, all the LVCMOS variants and LVDS are a must have too.

Currently unsupported are digitally controlled impedance (usually indicated by the regular IO standard names with a _DCI and _T_DCI suffix).