mirror of https://github.com/openXC7/prjxray.git
147 lines
5.0 KiB
ReStructuredText
147 lines
5.0 KiB
ReStructuredText
==========
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part files
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==========
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Both the ``part.json`` and ``part.yaml`` files contain information about
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the configuration resources of the FPGA chip. The files include information
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about bus types and the number of :term:`frames <Frame>` that
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are available for the given configurational :term:`column <Column>`.
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Additionally, the file stores information about the device ID and
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available *IO BANKS*.
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File format
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-----------
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Both files contain the same information, but since the ``part.yaml`` is
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less accessible, the description will be based on the ``part.json`` file.
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The ``part.json`` file is of the following form::
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{
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"global_clock_regions": {
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"bottom": {
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"rows": {
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"<ROW_NUMBER>" : {
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"configuration_buses": {
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"<CONFIGURATION_BUS>": {
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"configurational_columns": {
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"<COLUMN_NUMBER>": {
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"frame_count": <FRAME_COUNT>
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}
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<...>
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}
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}
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<...>
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}
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}
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<...>
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}
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},
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"top": {
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"rows": {
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"<ROW_NUMBER>" : {
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"configuration_buses": {
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"<CONFIGURATION_BUS>": {
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"configurational_columns": {
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"<COLUMN_NUMBER>": {
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"frame_count": <FRAME_COUNT>
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}
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<...>
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}
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}
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<...>
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}
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}
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<...>
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}
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},
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}
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},
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"idcode" : <IDCODE>,
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"iobanks" : {
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"<BANK_ID>": <BANK_POSITION>",
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<...>
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}
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}
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The file contains three main entries:
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- ``"global_clock_regions"`` - Contains the information about the configurational
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resources of the FPGA chip. The 7-Series FPGAs are divided into two
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:term:`halves <Half>` - ``top`` and ``bottom``. This explains the origin of
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those entries in the file.
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Every half contains a few ``rows`` associated with
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the global :term:`clock regions <Clock region>`. The particular row of the
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global :term:`clock regions <Clock region>` is indicated by the ``<ROW_NUMBER>``.
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Since every row can be configured by one of three configurational buses:
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``CLK_IO_CLKB``, ``BLOCK_RAM`` or ``CFG_CLB``, the appropriate bus is indicated by
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the ``<CONFIGURATION_BUS>``.
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There are many :term:`columns <Column>` connected to a single bus. Each column
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is described by appropriate ``<COLUMN_NUMBER>`` entry which contains the
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information about the number of frames (``<FRAME_COUNT>``) which can be
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used to configure the particular column.
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- ``"idcode"`` - ID of the given chip package
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- ``"iobanks"`` - a dictionary that contains the *IO Bank* ID (``<BANK_ID>``) and
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their position in the FPGA grid (``<BANK_POSITION>``).
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Examples
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--------
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.. code-block:: javascript
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{
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global_clock_regions": {
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"bottom": {
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"rows": {
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"0": {
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"configuration_buses": {
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"BLOCK_RAM": {
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"configuration_columns": {
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"0": {
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"frame_count": 128
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},
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"1": {
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"frame_count": 128
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},
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"2": {
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"frame_count": 128
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}
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}
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},
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"CLB_IO_CLK": {
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"configuration_columns": {
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"0": {
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"frame_count": 42
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},
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"1": {
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"frame_count": 30
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},
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"2": {
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"frame_count": 36
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},
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<...>
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}
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}
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<...>
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},
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},
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"top" : {
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<...>
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}
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},
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"idcode": 56803475,
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"iobanks": {
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"0": "X1Y78",
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"14": "X1Y26",
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"15": "X1Y78",
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"16": "X1Y130",
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"34": "X113Y26",
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"35": "X113Y78"
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}
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}
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