mirror of https://github.com/openXC7/prjxray.git
58 lines
2.2 KiB
Tcl
58 lines
2.2 KiB
Tcl
# Copyright (C) 2017-2020 The Project X-Ray Authors
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#
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# Use of this source code is governed by a ISC-style
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# license that can be found in the LICENSE file or at
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# https://opensource.org/licenses/ISC
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#
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# SPDX-License-Identifier: ISC
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proc extract_iobanks {filename} {
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set fp [open $filename "w"]
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foreach iobank [get_iobanks] {
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set sample_site [lindex [get_sites -of $iobank] 0]
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if {[llength $sample_site] == 0} continue
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set clock_region [get_property CLOCK_REGION $sample_site]
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foreach tile [concat [get_tiles -filter {TYPE=~HCLK_IOI3}] [get_tiles -filter {TYPE=~HCLK_IOI}]] {
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set tile_sites [get_sites -of_object $tile]
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if {[llength $tile_sites] == 0} continue
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set hclk_tile_clock_region [get_property CLOCK_REGION [lindex [get_sites -of_object $tile] 0]]
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if {$clock_region == $hclk_tile_clock_region} {
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set coord [lindex [split $tile "_"] 2]
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puts $fp "$iobank,$coord"
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}
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}
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}
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close $fp
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}
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create_project -force -part $::env(XRAY_PART) design design
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read_verilog ../../top.v
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synth_design -top top
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set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_00) IOSTANDARD LVCMOS18" [get_ports clk]
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set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_01) IOSTANDARD LVCMOS18" [get_ports di]
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set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_02) IOSTANDARD LVCMOS18" [get_ports do]
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set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_03) IOSTANDARD LVCMOS18" [get_ports stb]
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set_property CFGBVS VCCO [current_design]
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set_property CONFIG_VOLTAGE 3.3 [current_design]
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set_param tcl.collectionResultDisplayLimit 0
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set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets clk_IBUF]
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place_design
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route_design
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extract_iobanks iobanks.txt
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write_checkpoint -force design.dcp
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# Write a normal bitstream that will do a singe FDRI write of all the frames.
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write_bitstream -force design.bit
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# Write a perframecrc bitstream which writes each frame individually followed by
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# the frame address. This shows where there are gaps in the frame address
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# space.
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set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design]
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write_bitstream -force design.perframecrc.bit
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set_property BITSTREAM.GENERAL.PERFRAMECRC NO [current_design]
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