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prjxray/minitests/litex_litedram/src.yosys
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Tomasz Michalak c66f4f4aa1 Add license headers to tcl files 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>
 		2020-05-26 07:33:12 -07:00
..
verilog Fix trailing white space. 2019-11-03 15:07:24 -08:00
ExtractFrames.py Add or fix license header 2020-05-26 07:33:12 -07:00
Makefile Add licensing header to Makefiles 2020-05-26 07:33:12 -07:00
mem.init minitests: Add test for Litex DRAM memory interface 2019-10-24 14:28:37 +02:00
mem_1.init minitests: Add test for Litex DRAM memory interface 2019-10-24 14:28:37 +02:00
synth.ys minitests: Add test for Litex DRAM memory interface 2019-10-24 14:28:37 +02:00
top.tcl Add license headers to tcl files 2020-05-26 07:33:12 -07:00
top.xdc minitests: Add test for Litex DRAM memory interface 2019-10-24 14:28:37 +02:00