mirror of https://github.com/openXC7/prjxray.git
105 lines
2.5 KiB
Python
105 lines
2.5 KiB
Python
#!/usr/bin/env python3
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# -*- coding: utf-8 -*-
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#
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# Copyright (C) 2017-2020 The Project X-Ray Authors.
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#
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# Use of this source code is governed by a ISC-style
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# license that can be found in the LICENSE file or at
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# https://opensource.org/licenses/ISC
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#
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# SPDX-License-Identifier: ISC
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import json
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import io
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import os
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import random
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random.seed(int(os.getenv("SEED"), 16))
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from prjxray import util
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from prjxray import lut_maker
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from prjxray import verilog
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from prjxray.db import Database
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def gen_sites():
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db = Database(util.get_db_root(), util.get_part())
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grid = db.grid()
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for tile_name in sorted(grid.tiles()):
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if not 'CFG_CENTER_MID' in tile_name:
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continue
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print("// tile: " + str(tile_name))
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loc = grid.loc_of_tilename(tile_name)
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gridinfo = grid.gridinfo_at_loc(loc)
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sites = {}
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print("// " + str(gridinfo.sites.items()))
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for site_name, site_type in gridinfo.sites.items():
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if site_type == 'STARTUP':
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print("// got site: " + str(site_name))
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sites[site_type] = site_name
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if sites:
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yield tile_name, sites
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def run():
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params = {
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"tiles": [],
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}
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for tile, sites in gen_sites():
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for site_type, site in sites.items():
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p = {}
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p['tile'] = tile
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p['site'] = site
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p['CONNECTION'] = random.choice(
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(
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'HARD_ZERO',
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# hard zero or hard one does not make a difference
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# it only seems to matter if it is connected to a clock net or not
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#'HARD_ONE',
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'CLOCK',
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))
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params['tiles'].append(p)
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print(
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'''
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module top (input wire clk);
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(* KEEP, DONT_TOUCH *)
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STARTUPE2 STARTUPE2 (
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.CLK(1'b0),
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.GSR(1'b0),
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.GTS(1'b0),
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.KEYCLEARB(1'b1),
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.PACK(1'b0),
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.PREQ(),
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// Drive clock.''')
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connection = p['CONNECTION']
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if connection == "HARD_ZERO":
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print(" .USRCCLKO (1'b0),")
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elif connection == "HARD_ONE":
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print(" .USRCCLKO (1'b1),")
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else:
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print(" .USRCCLKO (clk),")
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print(
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'''
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.USRCCLKTS(1'b0),
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.USRDONEO (1'b0),
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.USRDONETS(1'b1),
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.CFGCLK(),
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.CFGMCLK(),
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.EOS()
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);
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endmodule
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''')
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with open('params.json', 'w') as f:
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json.dump(params, f, indent=2)
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if __name__ == '__main__':
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run()
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