Commit Graph

990 Commits

Author SHA1 Message Date
Karol Gugala b989c2fc05 fuzzers: tilegrid: mmcme: LOC mmcme2_adv instances
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-07-09 18:42:04 +02:00
Tomasz Michalak 948a3b21cc
Merge pull request #915 from antmicro/913_hclk_ioi_baseaddress
Calculate base addresses for HCLK_IOI3 tiles.
2019-07-04 23:32:20 +02:00
Karol Gugala 78346781ce fuzzers: 007: fix Makefile targets definitions
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-07-02 19:04:10 +02:00
Karol Gugala 28d961a650 fuzzers: routing BELs: group timings by interconn oputput
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-07-02 13:08:14 +02:00
Tomasz Michalak e096d9c172 005-tilegrid: Add HCLK_IOI base addresses calculation
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2019-07-01 08:58:45 +02:00
Karol Gugala 6cc614f1fb fuzzers: 007: fix BEL fuzzer Makefile
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-29 14:12:08 +02:00
Karol Gugala 9658653da8 fuzzers: bel: emit routing bels timings as INTERCONN
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-29 14:12:08 +02:00
Karol Gugala 03252bc46f fuzzers: 007: add gitignores
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-29 14:12:08 +02:00
Karol Gugala a99e26bbd4 fuzzers: 007: make both bels and routing-bels
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-29 14:12:08 +02:00
Karol Gugala cb3a2b42d7 fuzzers: 007: produce sdf files for routing bels
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-29 14:12:08 +02:00
Karol Gugala 2c1d4342b7 fuzzers: 007: format python
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-29 14:12:08 +02:00
Karol Gugala ec28d95604 fuzzers: 007: add routing BELs fuzzer
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-29 14:12:08 +02:00
Tomasz Michalak 36e9120fc7 Fix problem with falsely ignored PIPs
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2019-06-27 08:01:01 +02:00
litghost 5fb2153a0a
Merge pull request #889 from antmicro/875_44_clk_bufg_pips
Fix duplicate tag in 044-clk-bufg-pips
2019-06-26 08:31:58 -07:00
Alessandro Comodi ca6bbee193
Merge pull request #908 from antmicro/fix-bram-timing-fuzzer
007-timing: added missing aliases for bram timing
2019-06-26 13:00:20 +02:00
litghost b8f64484da
Merge pull request #901 from antmicro/bel-fuzzer-stabilization
BEL fuzzer stabilization
2019-06-25 10:43:12 -07:00
litghost 73a6bc5d77
Merge pull request #906 from antmicro/tilegrid_ioi
Calculate base addresses for IOI tiles
2019-06-25 10:20:06 -07:00
Tomasz Michalak 00c4672c12 fuzzers: Add 046-clk-bufg-mixed-pips fuzzer
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2019-06-25 18:52:00 +02:00
Tomasz Michalak 19ed8c5af8 044-clk-bufg-pips: Exclude CK_BUFG_(BOT|TOP)_R_CK_MUXED from todo list
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2019-06-25 18:52:00 +02:00
litghost 5845918552
Merge pull request #838 from antmicro/041_clk_hrow_pips_timeout
041-clk-hrow-pips: Fix timeout and bit collision problems
2019-06-25 09:18:44 -07:00
Alessandro Comodi 6476443a52 007-timing: added missing aliases for bram timing
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2019-06-25 17:13:44 +02:00
Tomasz Michalak 86164fdc18 005-tilegrid: propagate IOI SING and Y9 tiles
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2019-06-25 12:12:37 +02:00
Tomasz Michalak 9fb26b6915 005-tilegrid: calculate IOI base address
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2019-06-25 11:32:32 +02:00
Karol Gugala f6450b72b8 fuzzers: 007: bel: sort timing keywords
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-21 17:28:48 +02:00
Karol Gugala a560cc3500 fuzzers: 007: bel: do not copy timing data
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-21 17:28:05 +02:00
Karol Gugala 7821cb743c fuzzers: 007: refactor bel properties handling
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-21 17:27:26 +02:00
Karol Gugala b4634413da fuzzers: 007: bel: use functions for searching in speed_model
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-21 17:25:37 +02:00
Keith Rothman 29210f81da Add empty defaults for additional new database files.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2019-06-20 09:39:41 -07:00
Keith Rothman 01a0be3162 Add support to zero db to support simple groups.
Previously these kinds of zero groups would require encoding the
final bits, rather than tags.  This is extends the dbfixup to
construct groups via groups of tags, rather than groups of bits.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2019-06-19 14:46:39 -07:00
Tomasz Michalak 8c059c627b int_maketodo.py: Replace assertion with warning if PIP can't be balanced
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2019-06-19 11:11:40 +02:00
Tomasz Michalak 5831cf604f fuzzers: Re-enable fuzzer 041-clk-hrow-pips
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2019-06-19 11:11:20 +02:00
Tomasz Michalak 2814254cbf 041-clk-hrow-pips: Balance todo list
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2019-06-19 11:11:20 +02:00
Tomasz Michalak 678f915467 041-clk-hrow-pips: Don't solve fake features
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2019-06-19 11:11:20 +02:00
Karol Gugala d5dc09948a fuzzers: 007: remove unused code
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-19 10:53:19 +02:00
Karol Gugala 0fe609353e fuzzers: 007: update docstring for find_aliased_pin
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala 2d26781992 fuzzers: 007: tim2json: update docstrings
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala 37626d75e5 fuzzers: 007: fixup_timings: update docstrings
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala 9b04747da9 fuzzers: 007: bel: add README
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala afb0cc78da fuzzers: 007: add docstring and assert to line_fixup function
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala 63e6d17b50 fuzzers: 007: rename pin alias property -> is_property_related
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala bb9bc7bfdd fuzzers: 007: refactor aliased pins detection
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala 26614e5ed4 fuzzers: 007: restore missing continue
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala c9d661d161 fuzzers: 007: run make format
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala 73979fdf04 fuzzers: 007: handle pin/pin and pin/prop aliases
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala b122f07896 fuzzers: 007: do not emit clk -> clk timing checks
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala 209240e77f fuzzers: 007: handle output vector pins
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala cdcb759299 fuzzers: 007: remove commented code
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala 83657adbb9 fuzzers: 007: fix clock inputs inferring
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala ecb4fa1289 fuzzers: 007: use timings fixup
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala 91e7f3910e fuzzers: 007: add timings_fixup script
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00