Alessandro Comodi
e44027bcaf
Move all part-specific files to dedicated directory
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Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2020-01-24 10:13:33 +01:00
Maciej Kurc
cc7ba29c6b
Added forcing of manual routing through "BB" pips to toggle more bits.
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Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-11-15 12:14:06 +01:00
Maciej Kurc
03b0b9cefc
Added separate clock inputs for PLLs.
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Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-11-15 12:13:49 +01:00
Keith Rothman
280191ce0e
Attempt to fix fuzzer error.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2019-07-08 17:16:45 -07:00
Keith Rothman
b77c47b155
Fixes for zynq7 and PLL fuzzing.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2019-07-03 13:19:03 -07:00
Keith Rothman
30648d554a
Complete initial PLL fuzzer.
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This solves for all unknown bits, but results in a large "IN_USE"
feature for apparently constant bits.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2019-07-03 13:18:58 -07:00
Keith Rothman
bc822f8337
Update 032 with some fixes found during interconnect fuzzing.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2019-07-03 13:18:58 -07:00
Keith Rothman
68ad409d23
Refactor PLL segbits to leverage known register file.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2019-07-03 13:18:53 -07:00
Tim 'mithro' Ansell
9717fa48eb
docs: Fix top level headers and other small clean.
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* Make sure all files have top level headers.
* Fixing a few spelling mistakes.
* Fixed some trailing spaces.
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
2019-04-03 19:26:28 -07:00
John McMaster
815c3d4af2
fuzzers: name with tile type
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Signed-off-by: John McMaster <johndmcmaster@gmail.com>
2019-01-07 23:08:45 +01:00