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010: build dir 

Signed-off-by: John McMaster <johndmcmaster@gmail.com>
This commit is contained in:
John McMaster 2018-11-27 18:42:55 -08:00
parent 5715970e7d
commit fa48558c1c
4 changed files with 15 additions and 14 deletions
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5
fuzzers/010-lutinit/.gitignore vendored
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@ -1,3 +1,2 @@
/specimen_[0-9][0-9][0-9]/
/seg_clbl[lm].segbits
/run.ok
build
run.ok

17
fuzzers/010-lutinit/Makefile
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@ -2,20 +2,21 @@
# Could probably change segmatch to re though
N := 1
SPECIMENS := $(addprefix specimen_,$(shell seq -f '%03.0f' $(N)))
SPECIMENS := $(addprefix build/specimen_,$(shell seq -f '%03.0f' $(N)))
SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS))
database: $(SPECIMENS_OK)
${XRAY_SEGMATCH} -o seg_clbll.db $(addsuffix /segdata_clbll_[lr]_[012].txt,$(SPECIMENS))
${XRAY_SEGMATCH} -o seg_clblm.db $(addsuffix /segdata_clblm_[lr]_[012].txt,$(SPECIMENS))
${XRAY_SEGMATCH} -o build/seg_clbll.db $(addsuffix /segdata_clbll_[lr]_[012].txt,$(SPECIMENS))
${XRAY_SEGMATCH} -o build/seg_clblm.db $(addsuffix /segdata_clblm_[lr]_[012].txt,$(SPECIMENS))
pushdb:
${XRAY_MERGEDB} clbll_l seg_clbll.db
${XRAY_MERGEDB} clbll_r seg_clbll.db
${XRAY_MERGEDB} clblm_l seg_clblm.db
${XRAY_MERGEDB} clblm_r seg_clblm.db
${XRAY_MERGEDB} clbll_l build/seg_clbll.db
${XRAY_MERGEDB} clbll_r build/seg_clbll.db
${XRAY_MERGEDB} clblm_l build/seg_clblm.db
${XRAY_MERGEDB} clblm_r build/seg_clblm.db
$(SPECIMENS_OK):
mkdir -p build
bash generate.sh $(subst /OK,,$@)
touch $@
@ -26,7 +27,7 @@ run:
touch run.ok
clean:
rm -rf specimen_[0-9][0-9][0-9]/ seg_clbll.db seg_clblm.segbits run.ok
rm -rf build run.ok
.PHONY: database pushdb run clean

5
fuzzers/010-lutinit/generate.sh
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@ -1,16 +1,17 @@
#!/bin/bash
FUZDIR=$PWD
source ${XRAY_GENHEADER}
echo '`define SEED 32'"'h$(echo $1 | md5sum | cut -c1-8)" > setseed.vh
vivado -mode batch -source ../generate.tcl
vivado -mode batch -source $FUZDIR/generate.tcl
for i in 0 1 2; do
${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design_$i.bits -z -y design_$i.bit
done
for i in 0 1 2; do
python3 ../generate.py $i
python3 $FUZDIR/generate.py $i
done

2
fuzzers/010-lutinit/generate.tcl
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@ -1,6 +1,6 @@
create_project -force -part $::env(XRAY_PART) design design
read_verilog ../top.v
read_verilog ../../top.v
synth_design -top top
set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_00) IOSTANDARD LVCMOS33" [get_ports clk]