mirror of https://github.com/openXC7/prjxray.git
bram minitest: clean up tests
Signed-off-by: John McMaster <johndmcmaster@gmail.com>
This commit is contained in:
John McMaster
parent
11c485cc1f
commit
f9207b5618
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@ -7,12 +7,13 @@ clean:
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build/env:
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test "$(XRAY_PART)" = "xc7a50tfgg484-1"
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# Toggle one bit to locate where first BRAM data is
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build/roi_bramd_bit01.diff:
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$(MAKE) -f diff.mk OUT_DIFF=build/roi_bramd_bit01.diff PRJL=roi_bramd_bit0 PRJR=roi_bramd_bit1
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# Toggle one bit to locate where first BRAM data is (BRAM18)
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build/roi_bram18d_bit01.diff:
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$(MAKE) -f diff.mk OUT_DIFF=build/roi_bram18d_bit01.diff PRJL=roi_bram18d_bit0 PRJR=roi_bram18d_bit1
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build/roi_bramd2_bit01.diff:
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$(MAKE) -f diff.mk OUT_DIFF=build/roi_bramd2_bit01.diff PRJL=roi_bramd_bit0 PRJR=roi_bramd2_bit1
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# Toggle one bit to locate where first BRAM data is (BRAM36)
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build/roi_bram36d_bit01.diff:
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$(MAKE) -f diff.mk OUT_DIFF=build/roi_bram36d_bit01.diff PRJL=roi_bram36d_bit0 PRJR=roi_bram36d_bit1
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# Toggle all bits in a single BRAM data section
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build/roi_bramd_bits01.diff:
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@ -26,13 +27,6 @@ build/roi_bramds_bit01.diff:
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build/roi_brami_bit01.diff:
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$(MAKE) -f diff.mk OUT_DIFF=build/roi_brami_bit01.diff PRJL=roi_brami_bit0 PRJR=roi_brami_bit1
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# Toggle one bit in each BRAM18 config section
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# together they match the 2 BRAM36 bits above
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build/roi_bram18iy0_bit01.diff:
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$(MAKE) -f diff.mk OUT_DIFF=build/roi_bram18iy0_bit01.diff PRJL=roi_bram18i_bit0 PRJR=roi_bram18iy0_bit1
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build/roi_bram18iy1_bit01.diff:
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$(MAKE) -f diff.mk OUT_DIFF=build/roi_bram18iy1_bit01.diff PRJL=roi_bram18i_bit0 PRJR=roi_bram18iy1_bit1
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# Toggle one bit in each BRAM config section
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build/roi_bramis_bit01.diff:
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$(MAKE) -f diff.mk OUT_DIFF=build/roi_bramis_bit01.diff PRJL=roi_bramis_bit0 PRJR=roi_bramis_bit1
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@ -40,7 +34,6 @@ build/roi_bramis_bit01.diff:
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build/roi_bram18_width.diff:
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$(MAKE) -f diff.mk OUT_DIFF=build/roi_bram18_width.diff PRJL=roi_bram18_width_a PRJR=roi_bram18_width_b
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build/roi_bram18_write_mode.diff:
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$(MAKE) -f diff.mk OUT_DIFF=build/roi_bram18_write_mode.diff PRJL=roi_bram18_write_mode_a PRJR=roi_bram18_write_mode_b
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@ -32,26 +32,28 @@ module top(input clk, stb, di, output do);
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endmodule
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/******************************************************************************
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*******************************************************************************
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DATA ROI
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*******************************************************************************
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******************************************************************************/
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/******************************************************************************
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Toggle a single data bit to locate a single instance
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Toggle a single data bit to locate a single instance (BRAM36)
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******************************************************************************/
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module roi_bramd_bit0(input clk, input [255:0] din, output [255:0] dout);
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module roi_bram36d_bit0(input clk, input [255:0] din, output [255:0] dout);
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ram_RAMB36E1 #(.LOC("RAMB36_X0Y20"), .INIT0(1'b0), .INIT({256{1'b0}}))
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r0(.clk(clk), .din(din[ 0 +: 8]), .dout(dout[ 0 +: 8]));
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endmodule
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module roi_bramd_bit1(input clk, input [255:0] din, output [255:0] dout);
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module roi_bram36d_bit1(input clk, input [255:0] din, output [255:0] dout);
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ram_RAMB36E1 #(.LOC("RAMB36_X0Y20"), .INIT0(1'b1), .INIT({256{1'b0}}))
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r0(.clk(clk), .din(din[ 0 +: 8]), .dout(dout[ 0 +: 8]));
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endmodule
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module roi_bramd2_bit1(input clk, input [255:0] din, output [255:0] dout);
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ram_RAMB36E1 #(.LOC("RAMB36_X0Y20"), .INIT0(256'b10), .INIT({256{1'b0}}))
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r0(.clk(clk), .din(din[ 0 +: 8]), .dout(dout[ 0 +: 8]));
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endmodule
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/******************************************************************************
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Toggle a single data bit to locate a single instance (BRAM18)
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******************************************************************************/
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module roi_bram18d_bit0(input clk, input [255:0] din, output [255:0] dout);
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ram_RAMB18E1 #(.LOC("RAMB18_X0Y20"), .INIT0(1'b0), .INIT({256{1'b0}}))
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@ -78,7 +80,7 @@ module roi_bramd_bits1(input clk, input [255:0] din, output [255:0] dout);
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endmodule
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/******************************************************************************
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Toggle all the data bits in the ROI to show pitch between entries
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Toggle one bit per BRAM in the ROI to show pitch between entries
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******************************************************************************/
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module roi_bramds_bit0(input clk, input [255:0] din, output [255:0] dout);
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@ -128,30 +130,29 @@ module roi_bramds_bit1(input clk, input [255:0] din, output [255:0] dout);
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endmodule
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/******************************************************************************
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CONFIG ROI
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Set all data bits
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******************************************************************************/
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module roi_bram18i_bit0(input clk, input [255:0] din, output [255:0] dout);
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ram_RAMB18E1 #(.LOC("RAMB18_X0Y40"), .INIT0(1'b0), .INIT({256{1'b0}}), .IS_ENARDEN_INVERTED(1'b0))
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module roi_bram36_0s(input clk, input [255:0] din, output [255:0] dout);
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ram_RAMB36E1 #(.LOC("RAMB36_X0Y20"), .INIT0({256{1'b0}}), .INIT({256{1'b0}}))
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r0(.clk(clk), .din(din[ 0 +: 8]), .dout(dout[ 0 +: 8]));
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ram_RAMB18E1 #(.LOC("RAMB18_X0Y41"), .INIT0(1'b0), .INIT({256{1'b0}}), .IS_ENARDEN_INVERTED(1'b0))
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r1(.clk(clk), .din(din[ 8 +: 8]), .dout(dout[ 8 +: 8]));
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endmodule
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module roi_bram18iy0_bit1(input clk, input [255:0] din, output [255:0] dout);
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ram_RAMB18E1 #(.LOC("RAMB18_X0Y40"), .INIT0(1'b0), .INIT({256{1'b0}}), .IS_ENARDEN_INVERTED(1'b1))
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module roi_bram36_1s(input clk, input [255:0] din, output [255:0] dout);
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ram_RAMB36E1 #(.LOC("RAMB36_X0Y20"), .INIT0({256{1'b1}}), .INIT({256{1'b1}}))
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r0(.clk(clk), .din(din[ 0 +: 8]), .dout(dout[ 0 +: 8]));
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ram_RAMB18E1 #(.LOC("RAMB18_X0Y41"), .INIT0(1'b0), .INIT({256{1'b0}}), .IS_ENARDEN_INVERTED(1'b0))
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r1(.clk(clk), .din(din[ 8 +: 8]), .dout(dout[ 8 +: 8]));
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endmodule
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module roi_bram18iy1_bit1(input clk, input [255:0] din, output [255:0] dout);
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ram_RAMB18E1 #(.LOC("RAMB18_X0Y40"), .INIT0(1'b0), .INIT({256{1'b0}}), .IS_ENARDEN_INVERTED(1'b0))
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r0(.clk(clk), .din(din[ 0 +: 8]), .dout(dout[ 0 +: 8]));
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ram_RAMB18E1 #(.LOC("RAMB18_X0Y41"), .INIT0(1'b0), .INIT({256{1'b0}}), .IS_ENARDEN_INVERTED(1'b1))
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r1(.clk(clk), .din(din[ 8 +: 8]), .dout(dout[ 8 +: 8]));
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endmodule
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/******************************************************************************
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*******************************************************************************
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CONFIG ROI
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*******************************************************************************
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******************************************************************************/
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/******************************************************************************
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Toggle a single data bit to locate a single instance
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******************************************************************************/
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module roi_brami_bit0(input clk, input [255:0] din, output [255:0] dout);
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ram_RAMB36E1 #(.LOC("RAMB36_X0Y20"), .INIT0(1'b0), .INIT({256{1'b0}}), .IS_ENARDEN_INVERTED(1'b0))
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@ -163,6 +164,10 @@ module roi_brami_bit1(input clk, input [255:0] din, output [255:0] dout);
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r0(.clk(clk), .din(din[ 0 +: 8]), .dout(dout[ 0 +: 8]));
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endmodule
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/******************************************************************************
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Toggle one bit per BRAM in the ROI to show pitch between entries
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******************************************************************************/
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module roi_bramis_bit0(input clk, input [255:0] din, output [255:0] dout);
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ram_RAMB18E1 #(.LOC("RAMB18_X0Y40"), .INIT0(1'b0), .INIT({256{1'b0}}), .IS_ENARDEN_INVERTED(1'b0))
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r0(.clk(clk), .din(din[ 0 +: 8]), .dout(dout[ 0 +: 8]));
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@ -213,30 +218,6 @@ endmodule
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Misc ROI
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******************************************************************************/
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//ram_RAMB36E1 too much churn to be useful to compare vs above
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//instead lets change something more subtle
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// ERROR: [DRC REQP-1931] RAMB18E1_WEA_NO_CONNECT_OR_TIED_GND: roi/r0/ram programming
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// per UG473 requires that for SDP mode the WEA bus must be unconnected or tied to GND.
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module roi_bramd_sdp(input clk, input [255:0] din, output [255:0] dout);
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ram_RAMB18E1 #(.LOC("RAMB18_X0Y40"), .INIT0(1'b0), .INIT({256{1'b0}}), .RAM_MODE("SDP"))
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r0(.clk(clk), .din(din[ 0 +: 8]), .dout(dout[ 0 +: 8]));
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endmodule
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module roi_bramd_inv(input clk, input [255:0] din, output [255:0] dout);
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ram_RAMB18E1 #(.LOC("RAMB18_X0Y40"), .INIT0(1'b0), .INIT({256{1'b0}}), .IS_ENARDEN_INVERTED(1'b1))
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r0(.clk(clk), .din(din[ 0 +: 8]), .dout(dout[ 0 +: 8]));
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endmodule
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module roi_bram36_0s(input clk, input [255:0] din, output [255:0] dout);
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ram_RAMB36E1 #(.LOC("RAMB36_X0Y20"), .INIT0({256{1'b0}}), .INIT({256{1'b0}}))
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r0(.clk(clk), .din(din[ 0 +: 8]), .dout(dout[ 0 +: 8]));
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endmodule
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module roi_bram36_1s(input clk, input [255:0] din, output [255:0] dout);
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ram_RAMB36E1 #(.LOC("RAMB36_X0Y20"), .INIT0({256{1'b1}}), .INIT({256{1'b1}}))
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r0(.clk(clk), .din(din[ 0 +: 8]), .dout(dout[ 0 +: 8]));
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endmodule
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/*
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Place everything into first tile
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This is invalid since 18/36 share resources
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@ -320,7 +301,9 @@ module roi_bram18_ram_mode_sdp(input clk, input [255:0] din, output [255:0] dout
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endmodule
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/******************************************************************************
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*******************************************************************************
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Library
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*******************************************************************************
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******************************************************************************/
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