mirror of https://github.com/openXC7/prjxray.git
Add support for xc7s50
The previous xc7s50t branch was messed up. This new branch is created to re-submit xc7s50t's changes for merging. Signed-off-by: Steve <steve.bohan.liu@outlook.com>
This commit is contained in:
Steve
parent
60168e9b7e
commit
f3474a2625
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@ -1,6 +1,6 @@
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# Format: //devtools/kokoro/config/proto/build.proto
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build_file: "symbiflow-prjxray-continuous-db-spartan7/.github/kokoro/nothing.sh"
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build_file: "symbiflow-prjxray-continuous-db-spartan7/.github/kokoro/db-full.sh"
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timeout_mins: 4320
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@ -1,6 +1,6 @@
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# Format: //devtools/kokoro/config/proto/build.proto
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build_file: "symbiflow-prjxray-presubmit-db-spartan7/.github/kokoro/nothing.sh"
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build_file: "symbiflow-prjxray-presubmit-db-spartan7/.github/kokoro/db-full.sh"
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timeout_mins: 4320
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16
Makefile
16
Makefile
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@ -132,7 +132,7 @@ check-license:
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# Targets related to Project X-Ray databases
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# ------------------------
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DATABASES=artix7 kintex7 zynq7
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DATABASES=artix7 kintex7 zynq7 spartan7
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define database
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@ -186,8 +186,9 @@ $(foreach DB,$(DATABASES),$(eval $(call database,$(DB))))
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ARTIX_PARTS=artix7_50t artix7_200t
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ZYNQ_PARTS=zynq7010
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KINTEX_PARTS=
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SPARTAN_PARTS=
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XRAY_PARTS=${ARTIX_PARTS} ${ZYNQ_PARTS} ${KINTEX_PARTS}
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XRAY_PARTS=${ARTIX_PARTS} ${ZYNQ_PARTS} ${KINTEX_PARTS} ${SPARTAN_PARTS}
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define multiple-parts
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@ -240,6 +241,15 @@ db-extras-kintex7-roi: $(addprefix db-roi-only-,$(KINTEX_PARTS))
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db-extras-kintex7-harness:
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@true
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db-extras-spartan7-parts:
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@true
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db-extras-spartan7-roi:
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@true
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db-extras-spartan7-harness:
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@true
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db-extras-zynq7-parts: $(addprefix db-part-only-,$(ZYNQ_PARTS))
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db-extras-zynq7-roi: $(addprefix db-roi-only-,$(ZYNQ_PARTS))
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@ -265,4 +275,4 @@ clean:
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$(MAKE) -C fuzzers clean
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rm -rf build
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.PHONY: clean
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.PHONY: clean
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@ -0,0 +1,110 @@
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CMT_TOP_L_LOWER_T_X106Y18/CMT_PHASER_DOWN_DQS_TO_PHASER_A
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CMT_TOP_L_LOWER_T_X106Y70/CMT_PHASER_DOWN_DQS_TO_PHASER_A
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CMT_TOP_L_UPPER_B_X106Y31/CMT_PHASER_UP_DQS_TO_PHASER_D
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CMT_TOP_L_UPPER_B_X106Y83/CMT_PHASER_UP_DQS_TO_PHASER_D
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CMT_TOP_R_LOWER_T_X8Y122/CMT_PHASER_DOWN_DQS_TO_PHASER_A
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CMT_TOP_R_LOWER_T_X8Y18/CMT_PHASER_DOWN_DQS_TO_PHASER_A
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CMT_TOP_R_LOWER_T_X8Y70/CMT_PHASER_DOWN_DQS_TO_PHASER_A
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CMT_TOP_R_UPPER_B_X8Y135/CMT_PHASER_UP_DQS_TO_PHASER_D
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CMT_TOP_R_UPPER_B_X8Y31/CMT_PHASER_UP_DQS_TO_PHASER_D
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CMT_TOP_R_UPPER_B_X8Y83/CMT_PHASER_UP_DQS_TO_PHASER_D
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LIOI3_TBYTESRC_X0Y107/LIOI_I2GCLK_BOT1
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LIOI3_TBYTESRC_X0Y107/LIOI_I2GCLK_TOP1
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LIOI3_TBYTESRC_X0Y119/LIOI_I2GCLK_BOT1
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LIOI3_TBYTESRC_X0Y119/LIOI_I2GCLK_TOP1
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LIOI3_TBYTESRC_X0Y131/LIOI_I2GCLK_BOT1
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LIOI3_TBYTESRC_X0Y131/LIOI_I2GCLK_TOP1
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LIOI3_TBYTESRC_X0Y143/LIOI_I2GCLK_BOT1
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LIOI3_TBYTESRC_X0Y143/LIOI_I2GCLK_TOP1
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LIOI3_TBYTESRC_X0Y19/LIOI_I2GCLK_BOT1
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LIOI3_TBYTESRC_X0Y19/LIOI_I2GCLK_TOP1
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LIOI3_TBYTESRC_X0Y31/LIOI_I2GCLK_BOT1
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LIOI3_TBYTESRC_X0Y31/LIOI_I2GCLK_TOP1
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LIOI3_TBYTESRC_X0Y43/LIOI_I2GCLK_BOT1
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LIOI3_TBYTESRC_X0Y43/LIOI_I2GCLK_TOP1
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LIOI3_TBYTESRC_X0Y57/LIOI_I2GCLK_BOT1
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LIOI3_TBYTESRC_X0Y57/LIOI_I2GCLK_TOP1
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LIOI3_TBYTESRC_X0Y69/LIOI_I2GCLK_BOT1
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LIOI3_TBYTESRC_X0Y69/LIOI_I2GCLK_TOP1
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LIOI3_TBYTESRC_X0Y7/LIOI_I2GCLK_BOT1
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LIOI3_TBYTESRC_X0Y7/LIOI_I2GCLK_TOP1
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LIOI3_TBYTESRC_X0Y81/LIOI_I2GCLK_BOT1
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LIOI3_TBYTESRC_X0Y81/LIOI_I2GCLK_TOP1
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LIOI3_TBYTESRC_X0Y93/LIOI_I2GCLK_BOT1
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LIOI3_TBYTESRC_X0Y93/LIOI_I2GCLK_TOP1
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LIOI3_TBYTETERM_X0Y113/LIOI_I2GCLK_BOT1
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LIOI3_TBYTETERM_X0Y113/LIOI_I2GCLK_TOP1
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LIOI3_TBYTETERM_X0Y137/LIOI_I2GCLK_BOT1
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LIOI3_TBYTETERM_X0Y137/LIOI_I2GCLK_TOP1
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LIOI3_TBYTETERM_X0Y13/LIOI_I2GCLK_BOT1
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LIOI3_TBYTETERM_X0Y13/LIOI_I2GCLK_TOP1
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LIOI3_TBYTETERM_X0Y37/LIOI_I2GCLK_BOT1
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LIOI3_TBYTETERM_X0Y37/LIOI_I2GCLK_TOP1
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LIOI3_TBYTETERM_X0Y63/LIOI_I2GCLK_BOT1
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LIOI3_TBYTETERM_X0Y63/LIOI_I2GCLK_TOP1
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LIOI3_TBYTETERM_X0Y87/LIOI_I2GCLK_BOT1
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LIOI3_TBYTETERM_X0Y87/LIOI_I2GCLK_TOP1
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LIOI3_X0Y105/LIOI_I2GCLK_TOP1
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LIOI3_X0Y109/LIOI_I2GCLK_BOT1
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LIOI3_X0Y117/LIOI_I2GCLK_TOP1
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LIOI3_X0Y121/LIOI_I2GCLK_BOT1
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LIOI3_X0Y129/LIOI_I2GCLK_TOP1
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LIOI3_X0Y133/LIOI_I2GCLK_BOT1
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LIOI3_X0Y141/LIOI_I2GCLK_TOP1
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LIOI3_X0Y145/LIOI_I2GCLK_BOT1
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LIOI3_X0Y17/LIOI_I2GCLK_TOP1
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LIOI3_X0Y21/LIOI_I2GCLK_BOT1
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LIOI3_X0Y29/LIOI_I2GCLK_TOP1
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LIOI3_X0Y33/LIOI_I2GCLK_BOT1
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LIOI3_X0Y41/LIOI_I2GCLK_TOP1
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LIOI3_X0Y45/LIOI_I2GCLK_BOT1
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LIOI3_X0Y55/LIOI_I2GCLK_TOP1
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LIOI3_X0Y59/LIOI_I2GCLK_BOT1
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LIOI3_X0Y5/LIOI_I2GCLK_TOP1
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LIOI3_X0Y67/LIOI_I2GCLK_TOP1
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LIOI3_X0Y71/LIOI_I2GCLK_BOT1
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LIOI3_X0Y79/LIOI_I2GCLK_TOP1
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LIOI3_X0Y83/LIOI_I2GCLK_BOT1
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LIOI3_X0Y91/LIOI_I2GCLK_TOP1
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LIOI3_X0Y95/LIOI_I2GCLK_BOT1
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LIOI3_X0Y9/LIOI_I2GCLK_BOT1
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RIOI3_TBYTESRC_X43Y19/RIOI_I2GCLK_BOT1
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RIOI3_TBYTESRC_X43Y19/RIOI_I2GCLK_TOP1
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RIOI3_TBYTESRC_X43Y31/RIOI_I2GCLK_BOT1
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RIOI3_TBYTESRC_X43Y31/RIOI_I2GCLK_TOP1
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RIOI3_TBYTESRC_X43Y43/RIOI_I2GCLK_BOT1
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RIOI3_TBYTESRC_X43Y43/RIOI_I2GCLK_TOP1
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RIOI3_TBYTESRC_X43Y57/RIOI_I2GCLK_BOT1
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RIOI3_TBYTESRC_X43Y57/RIOI_I2GCLK_TOP1
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RIOI3_TBYTESRC_X43Y69/RIOI_I2GCLK_BOT1
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RIOI3_TBYTESRC_X43Y69/RIOI_I2GCLK_TOP1
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RIOI3_TBYTESRC_X43Y7/RIOI_I2GCLK_BOT1
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RIOI3_TBYTESRC_X43Y7/RIOI_I2GCLK_TOP1
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RIOI3_TBYTESRC_X43Y81/RIOI_I2GCLK_BOT1
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RIOI3_TBYTESRC_X43Y81/RIOI_I2GCLK_TOP1
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RIOI3_TBYTESRC_X43Y93/RIOI_I2GCLK_BOT1
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RIOI3_TBYTESRC_X43Y93/RIOI_I2GCLK_TOP1
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RIOI3_TBYTETERM_X43Y13/RIOI_I2GCLK_BOT1
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RIOI3_TBYTETERM_X43Y13/RIOI_I2GCLK_TOP1
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RIOI3_TBYTETERM_X43Y37/RIOI_I2GCLK_BOT1
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RIOI3_TBYTETERM_X43Y37/RIOI_I2GCLK_TOP1
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RIOI3_TBYTETERM_X43Y63/RIOI_I2GCLK_BOT1
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RIOI3_TBYTETERM_X43Y63/RIOI_I2GCLK_TOP1
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RIOI3_TBYTETERM_X43Y87/RIOI_I2GCLK_BOT1
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RIOI3_TBYTETERM_X43Y87/RIOI_I2GCLK_TOP1
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RIOI3_X43Y17/RIOI_I2GCLK_TOP1
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RIOI3_X43Y21/RIOI_I2GCLK_BOT1
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RIOI3_X43Y29/RIOI_I2GCLK_TOP1
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RIOI3_X43Y33/RIOI_I2GCLK_BOT1
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RIOI3_X43Y41/RIOI_I2GCLK_TOP1
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RIOI3_X43Y45/RIOI_I2GCLK_BOT1
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RIOI3_X43Y55/RIOI_I2GCLK_TOP1
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RIOI3_X43Y59/RIOI_I2GCLK_BOT1
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RIOI3_X43Y5/RIOI_I2GCLK_TOP1
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RIOI3_X43Y67/RIOI_I2GCLK_TOP1
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RIOI3_X43Y71/RIOI_I2GCLK_BOT1
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RIOI3_X43Y79/RIOI_I2GCLK_TOP1
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RIOI3_X43Y83/RIOI_I2GCLK_BOT1
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RIOI3_X43Y91/RIOI_I2GCLK_TOP1
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RIOI3_X43Y95/RIOI_I2GCLK_BOT1
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RIOI3_X43Y9/RIOI_I2GCLK_BOT1
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@ -0,0 +1,51 @@
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#!/bin/bash
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# Copyright (C) 2017-2021 The Project X-Ray Authors.
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#
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# Use of this source code is governed by a ISC-style
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# license that can be found in the LICENSE file or at
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# https://opensource.org/licenses/ISC
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#
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# SPDX-License-Identifier: ISC
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export XRAY_DATABASE="spartan7"
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export XRAY_PART="xc7s50fgga484-1"
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export XRAY_ROI_FRAMES="0x00000000:0xffffffff"
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# All CLB's in part, all BRAM's in part, all DSP's in part.
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# tcl queries IOB => don't bother adding
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export XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X65Y99 SLICE_X0Y100:SLICE_X57Y149 RAMB18_X0Y0:RAMB18_X1Y59 RAMB36_X0Y0:RAMB36_X1Y29 RAMB18_X2Y0:RAMB18_X2Y39 RAMB36_X2Y0:RAMB36_X2Y19 DSP48_X0Y0:DSP48_X1Y59"
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export XRAY_EXCLUDE_ROI_TILEGRID=""
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# This is used by fuzzers/005-tilegrid/generate_full.py
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# (special handling for frame addresses of certain IOIs -- see the script for details).
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# This needs to be changed for any new device!
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# If you have a FASM mismatch or unknown bits in IOIs, CHECK THIS FIRST.
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export XRAY_IOI3_TILES="LIOI3_X0Y9 RIOI3_X43Y9"
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# These settings must remain in sync
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export XRAY_ROI="SLICE_X0Y100:SLICE_X35Y149 RAMB18_X0Y40:RAMB18_X0Y59 RAMB36_X0Y20:RAMB36_X0Y29 DSP48_X0Y40:DSP48_X0Y59 IOB_X0Y100:IOB_X0Y149"
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# Most of CMT X0Y2.
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export XRAY_ROI_GRID_X1="10"
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export XRAY_ROI_GRID_X2="58"
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# Include VBRK / VTERM
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export XRAY_ROI_GRID_Y1="0"
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export XRAY_ROI_GRID_Y2="51"
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# clock pin
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export XRAY_PIN_00="F14"
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# data pins
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export XRAY_PIN_01="F13"
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export XRAY_PIN_02="F12"
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export XRAY_PIN_03="F11"
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export XRAY_PIN_04="G11"
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export XRAY_PIN_05="G10"
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export XRAY_PIN_06="G13"
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source $(dirname ${BASH_SOURCE[0]})/../utils/environment.sh
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eval $(python3 ${XRAY_UTILS_DIR}/create_environment.py)
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ENV_RET=$?
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if [[ $ENV_RET != 0 ]] ; then
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return $ENV_RET
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fi
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eval $env
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@ -0,0 +1,4 @@
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# device to fabric mapping
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"xc7s50":
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fabric: "xc7s50"
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@ -30,7 +30,7 @@ def main():
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parser.add_argument(
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'family',
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help="Name of the device family.",
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choices=['artix7', 'kintex7', 'zynq7'])
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choices=['artix7', 'kintex7', 'zynq7', 'spartan7'])
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util.db_root_arg(parser)
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args = parser.parse_args()
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@ -30,7 +30,7 @@ def main():
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parser.add_argument(
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'family',
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help="Name of the device family.",
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choices=['artix7', 'kintex7', 'zynq7'])
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choices=['artix7', 'kintex7', 'zynq7', 'spartan7'])
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util.db_root_arg(parser)
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args = parser.parse_args()
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Loading…
Reference in New Issue