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Merge pull request #482 from antmicro/add-tdb-fixme 

005-tilegrid/add_tdb.py: added frame check
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John Mcmaster 2019-01-10 12:37:06 +01:00 committed by GitHub
parent 08aaa19551 65f5ddb030
commit eae584d5a5
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1 changed files with 15 additions and 4 deletions
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19
fuzzers/005-tilegrid/add_tdb.py
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@ -52,18 +52,29 @@ def parse_addr(line):
return frame, wordidx, bitidx return frame, wordidx, bitidx
def check_frames(frames):
baseaddr = set()
for frame in frames:
baseaddr.add(frame // 128)
assert len(baseaddr) == 1, "Multiple base addresses for the same tag"
def load_db(fn): def load_db(fn):
for l in open(fn, "r"): for l in open(fn, "r"):
l = l.strip() l = l.strip()
# FIXME: add offset to name # FIXME: add offset to name
# IOB_X0Y101.DFRAME:27.DWORD:3.DBIT:3 00020027_003_03 # IOB_X0Y101.DFRAME:27.DWORD:3.DBIT:3 00020027_003_03
parts = l.split(' ') parts = l.split(' ')
# FIXME: need to check that all bits in part have same baseaddr, for now only the first bit is taken
#assert len(parts) == 2, "Unresolved bit: %s" % l
tagstr = parts[0] tagstr = parts[0]
addrstr = parts[1] addrlist = parts[1:]
frames = list()
for addrstr in addrlist:
frame, wordidx, bitidx = parse_addr(addrstr) frame, wordidx, bitidx = parse_addr(addrstr)
frames.append(frame)
check_frames(frames)
# Take the first address in the list
frame, wordidx, bitidx = parse_addr(addrlist[0])
bitidx_up = False bitidx_up = False
tparts = tagstr.split('.') tparts = tagstr.split('.')