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bram-sdp minitest: added minitest to check features of SDP brams 

Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
This commit is contained in:
Alessandro Comodi 2020-03-04 16:46:58 +01:00
parent 418063afdc
commit d7e2fff2a6
4 changed files with 158 additions and 0 deletions
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7
minitests/bram-sdp/Makefile Normal file
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all:
mkdir -p build
cd build && bash ../runme.sh
clean:
rm -rf build/

9
minitests/bram-sdp/runme.sh Executable file
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#!/bin/bash
set -ex
${XRAY_VIVADO} -mode batch -source ../runme.tcl
${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design.bits -z -y design.bit
test -z "$(fgrep CRITICAL vivado.log)"
${XRAY_SEGPRINT} -z -D design.bits > design.txt
${XRAY_BIT2FASM} design.bit > design.fasm

16
minitests/bram-sdp/runme.tcl Normal file
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create_project -force -part $::env(XRAY_PART) design design
read_verilog ../top.v
synth_design -top top -flatten_hierarchy none
set_property CFGBVS VCCO [current_design]
set_property CONFIG_VOLTAGE 3.3 [current_design]
set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design]
place_design
route_design
set_property IS_ENABLED 0 [get_drc_checks {NSTD-1}]
set_property IS_ENABLED 0 [get_drc_checks {UCIO-1}]
write_checkpoint -force design.dcp
write_bitstream -force design.bit

126
minitests/bram-sdp/top.v Normal file
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module top (
);
// Both RAMB18 in the same tile
(* KEEP, DONT_TOUCH, LOC="RAMB18_X0Y25" *)
RAMB18E1 #(
.RAM_MODE("SDP"),
.READ_WIDTH_A(36),
.READ_WIDTH_B(0),
.WRITE_MODE_A("READ_FIRST"),
.WRITE_MODE_B("READ_FIRST"),
.WRITE_WIDTH_A(0),
.WRITE_WIDTH_B(36)
) RAMB18E1_BOTH_X1 (
.ENARDEN(1'b1),
.ENBWREN(1'b1),
.REGCEAREGCE(1'b1),
.REGCEB(1'b0),
.RSTRAMARSTRAM(1'b1),
.RSTRAMB(1'b1),
.RSTREGARSTREG(1'b1),
.RSTREGB(1'b1),
.WEA({1'b0}),
.WEBWE({1'b0})
);
(* KEEP, DONT_TOUCH, LOC="RAMB18_X0Y24" *)
RAMB18E1 #(
.RAM_MODE("SDP"),
.READ_WIDTH_A(36),
.READ_WIDTH_B(0),
.WRITE_MODE_A("READ_FIRST"),
.WRITE_MODE_B("READ_FIRST"),
.WRITE_WIDTH_A(0),
.WRITE_WIDTH_B(36)
) RAMB18E1_BOTH_X0 (
.ENARDEN(1'b1),
.ENBWREN(1'b1),
.REGCEAREGCE(1'b1),
.REGCEB(1'b0),
.RSTRAMARSTRAM(1'b1),
.RSTRAMB(1'b1),
.RSTREGARSTREG(1'b1),
.RSTREGB(1'b1),
.WEA({1'b0}),
.WEBWE({1'b0})
);
// ---------------------------------------
// One RAMB18 in Y0
(* KEEP, DONT_TOUCH, LOC="RAMB18_X0Y22" *)
RAMB18E1 #(
.RAM_MODE("SDP"),
.READ_WIDTH_A(36),
.READ_WIDTH_B(0),
.WRITE_MODE_A("READ_FIRST"),
.WRITE_MODE_B("READ_FIRST"),
.WRITE_WIDTH_A(0),
.WRITE_WIDTH_B(36)
) RAMB18E1_X0 (
.ENARDEN(1'b1),
.ENBWREN(1'b1),
.REGCEAREGCE(1'b1),
.REGCEB(1'b0),
.RSTRAMARSTRAM(1'b1),
.RSTRAMB(1'b1),
.RSTREGARSTREG(1'b1),
.RSTREGB(1'b1),
.WEA({1'b0}),
.WEBWE({1'b0})
);
// ---------------------------------------
// One RAMB18 in Y1
(* KEEP, DONT_TOUCH, LOC="RAMB18_X0Y21" *)
RAMB18E1 #(
.RAM_MODE("SDP"),
.READ_WIDTH_A(36),
.READ_WIDTH_B(0),
.WRITE_MODE_A("READ_FIRST"),
.WRITE_MODE_B("READ_FIRST"),
.WRITE_WIDTH_A(0),
.WRITE_WIDTH_B(36)
) RAMB18E1_X1 (
.ENARDEN(1'b1),
.ENBWREN(1'b1),
.REGCEAREGCE(1'b1),
.REGCEB(1'b0),
.RSTRAMARSTRAM(1'b1),
.RSTRAMB(1'b1),
.RSTREGARSTREG(1'b1),
.RSTREGB(1'b1),
.WEA({1'b0}),
.WEBWE({1'b0})
);
// ---------------------------------------
// One RAMB36
(* KEEP, DONT_TOUCH, LOC="RAMB36_X0Y9" *)
RAMB36E1 #(
.RAM_MODE("SDP"),
.READ_WIDTH_A(72),
.READ_WIDTH_B(0),
.WRITE_MODE_A("READ_FIRST"),
.WRITE_MODE_B("READ_FIRST"),
.WRITE_WIDTH_A(0),
.WRITE_WIDTH_B(72)
) RAMB36E1_X0 (
.ENARDEN(1'b1),
.ENBWREN(1'b1),
.REGCEAREGCE(1'b1),
.REGCEB(1'b0),
.RSTRAMARSTRAM(1'b1),
.RSTRAMB(1'b1),
.RSTREGARSTREG(1'b1),
.RSTREGB(1'b1),
.WEA({1'b0}),
.WEBWE({1'b0})
);
endmodule