mirror of https://github.com/openXC7/prjxray.git
Make n5FFMUX match Vivado GUI.
CLBLL_L.SLICEL_X0.D5FF.MUX.A -> CLBLL_L.SLICEL_X0.D5FFMUX.IN_A CLBLL_L.SLICEL_X0.D5FF.MUX.B -> CLBLL_L.SLICEL_X0.D5FFMUX.IN_B Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
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cf64309ee3
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@ -26,7 +26,7 @@ for l in f:
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# Theory: there is one bit for each mux positon
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# Theory: there is one bit for each mux positon
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# In each config 3 muxes are in one position, other 3 are in another
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# In each config 3 muxes are in one position, other 3 are in another
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inv = int(i == n)
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inv = int(i == n)
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segmk.addtag(loc, "%c5FF.MUX.A" % which, def_a ^ inv)
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segmk.addtag(loc, "%c5FFMUX.IN_A" % which, def_a ^ inv)
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segmk.addtag(loc, "%c5FF.MUX.B" % which, 1 ^ def_a ^ inv)
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segmk.addtag(loc, "%c5FFMUX.IN_B" % which, 1 ^ def_a ^ inv)
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segmk.compile()
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segmk.compile()
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segmk.write()
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segmk.write()
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@ -212,7 +212,7 @@ for segname, segdata in grid["segments"].items():
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print(" loading %s segbits." % segtype)
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print(" loading %s segbits." % segtype)
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with db_open("segbits_%s.db" % segtype) as f:
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with db_open("segbits_%s.db" % segtype) as f:
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for line in f:
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for line in f:
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if re.search(r"(\.[ABCD](FF|OUT)MUX\.)|(\.PRECYINIT\.)", line):
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if re.search(r"(\.[ABCD](5?FF|OUT)MUX\.)|(\.PRECYINIT\.)", line):
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add_pip_bits(line)
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add_pip_bits(line)
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else:
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else:
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add_single_bit(line)
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add_single_bit(line)
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