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Final fixes to the fuzzer. 

Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
This commit is contained in:
Maciej Kurc 2019-07-16 10:27:40 +02:00
parent c9ce06f688
commit c880707d27
5 changed files with 53 additions and 30 deletions
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4
fuzzers/035a-iob-idelay/Makefile
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@ -4,7 +4,7 @@ include ../fuzzer.mk
database: build/segbits_xiob33.db database: build/segbits_xiob33.db
build/segbits_xiob33.rdb: $(SPECIMENS_OK) build/segbits_xiob33.rdb: $(SPECIMENS_OK)
${XRAY_SEGMATCH} -m 2 -M 2 -o build/segbits_xiob33.rdb $$(find -name segdata_*.txt) ${XRAY_SEGMATCH} -m 1 -M 1 -o build/segbits_xiob33.rdb $$(find -name segdata_*.txt)
build/segbits_xiob33.db: build/segbits_xiob33.rdb build/segbits_xiob33.db: build/segbits_xiob33.rdb
${XRAY_DBFIXUP} --db-root build --zero-db bits.dbf --seg-fn-in $^ --seg-fn-out $@ ${XRAY_DBFIXUP} --db-root build --zero-db bits.dbf --seg-fn-in $^ --seg-fn-out $@
@ -16,5 +16,5 @@ pushdb:
${XRAY_MERGEDB} mask_liob33 build/mask_xiob33.db ${XRAY_MERGEDB} mask_liob33 build/mask_xiob33.db
${XRAY_MERGEDB} mask_riob33 build/mask_xiob33.db ${XRAY_MERGEDB} mask_riob33 build/mask_xiob33.db
.PHONY: todo database pushdb .PHONY: database pushdb

0
fuzzers/035a-iob-idelay/bits.dbf Normal file
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27
fuzzers/035a-iob-idelay/generate.py
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@ -11,9 +11,8 @@ segmk = Segmaker("design.bits", verbose=True)
with open("params.json", "r") as fp: with open("params.json", "r") as fp:
data = json.load(fp) data = json.load(fp)
idelay_types = ["FIXED", "VARIABLE", "VAR_LOAD"] idelay_types = ["FIXED", "VARIABLE", "VAR_LOAD"]
delay_srcs = ["IDATAIN", "DATAIN"] delay_srcs = ["IDATAIN", "DATAIN"]
signal_patterns = ["DATA", "CLOCK"]
# Output tags # Output tags
for params in data: for params in data:
@ -21,31 +20,35 @@ for params in data:
# Delay type # Delay type
value = verilog.unquote(params["IDELAY_TYPE"]) value = verilog.unquote(params["IDELAY_TYPE"])
value = value.replace("_PIPE", "") # VAR_LOAD and VAR_LOAD_PIPE are the same value = value.replace(
"_PIPE", "") # VAR_LOAD and VAR_LOAD_PIPE are the same
for x in idelay_types: for x in idelay_types:
segmk.add_site_tag(loc, "IDELAY_TYPE_%s" % x, int(value == x)) segmk.add_site_tag(loc, "IDELAY_TYPE_%s" % x, int(value == x))
# Delay value # Delay value
value = int(params["IDELAY_VALUE"]) value = int(params["IDELAY_VALUE"])
for i in range(5): for i in range(5):
segmk.add_site_tag(loc, "IDELAY_VALUE[%01d]" % i, ((value >> i) & 1) != 0) segmk.add_site_tag(
loc, "IDELAY_VALUE[%01d]" % i, ((value >> i) & 1) != 0)
# Delay source # Delay source
value = verilog.unquote(params["DELAY_SRC"]) value = verilog.unquote(params["DELAY_SRC"])
for x in delay_srcs: for x in delay_srcs:
segmk.add_site_tag(loc, "DELAY_SRC_%s" % x, int(value == x)) segmk.add_site_tag(loc, "DELAY_SRC_%s" % x, int(value == x))
value = verilog.unquote(params["HIGH_PERFORMANCE_MODE"]) value = verilog.unquote(params["HIGH_PERFORMANCE_MODE"])
segmk.add_site_tag(loc, "HIGH_PERFORMANCE_MODE", int(value == "TRUE")) segmk.add_site_tag(loc, "HIGH_PERFORMANCE_MODE", int(value == "TRUE"))
value = verilog.unquote(params["CINVCTRL_SEL"]) value = verilog.unquote(params["CINVCTRL_SEL"])
segmk.add_site_tag(loc, "CINVCTRL_SEL", int(value == "TRUE")) segmk.add_site_tag(loc, "CINVCTRL_SEL", int(value == "TRUE"))
value = verilog.unquote(params["PIPE_SEL"]) value = verilog.unquote(params["PIPE_SEL"])
segmk.add_site_tag(loc, "PIPE_SEL", int(value == "TRUE")) segmk.add_site_tag(loc, "PIPE_SEL", int(value == "TRUE"))
def bitfilter(frame_idx, bit_idx): def bitfilter(frame_idx, bit_idx):
return True return True
segmk.compile(bitfilter=bitfilter) segmk.compile(bitfilter=bitfilter)
segmk.write() segmk.write()

51
fuzzers/035a-iob-idelay/top.py
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@ -11,13 +11,18 @@ from prjxray.db import Database
# ============================================================================= # =============================================================================
def get_loc(name): def get_loc(name):
m = re.match("^\S+_X([0-9]+)Y([0-9]+)$", name) m = re.match("^\S+_X([0-9]+)Y([0-9]+)$", name)
assert m != None assert m != None
x = int(m.group(1)) x = int(m.group(1))
y = int(m.group(2)) y = int(m.group(2))
return (x, y,) return (
x,
y,
)
def gen_sites(): def gen_sites():
db = Database(util.get_db_root()) db = Database(util.get_db_root())
@ -36,20 +41,22 @@ def gen_sites():
tile_list.sort(key=key) tile_list.sort(key=key)
for iob_tile_name in tile_list: for iob_tile_name in tile_list:
iob_gridinfo = grid.gridinfo_at_loc(grid.loc_of_tilename(iob_tile_name)) iob_gridinfo = grid.gridinfo_at_loc(
grid.loc_of_tilename(iob_tile_name))
# Find IOI tile adjacent to IOB # Find IOI tile adjacent to IOB
for suffix in ["IOI3", "IOI3_TBYTESRC", "IOI3_TBYTETERM"]: for suffix in ["IOI3", "IOI3_TBYTESRC", "IOI3_TBYTETERM"]:
try: try:
ioi_tile_name = iob_tile_name.replace("IOB33", suffix) ioi_tile_name = iob_tile_name.replace("IOB33", suffix)
ioi_gridinfo = grid.gridinfo_at_loc(grid.loc_of_tilename(ioi_tile_name)) ioi_gridinfo = grid.gridinfo_at_loc(
grid.loc_of_tilename(ioi_tile_name))
break break
except KeyError: except KeyError:
pass pass
#idelay = [k for k,v in ioi_gridinfo.sites.items() if v == "IDELAYE2"][0] #idelay = [k for k,v in ioi_gridinfo.sites.items() if v == "IDELAYE2"][0]
iob33s = [k for k,v in iob_gridinfo.sites.items() if v == "IOB33S"][0] iob33s = [k for k, v in iob_gridinfo.sites.items() if v == "IOB33S"][0]
iob33m = [k for k,v in iob_gridinfo.sites.items() if v == "IOB33M"][0] iob33m = [k for k, v in iob_gridinfo.sites.items() if v == "IOB33M"][0]
idelay_s = iob33s.replace("IOB", "IDELAY") idelay_s = iob33s.replace("IOB", "IDELAY")
idelay_m = iob33m.replace("IOB", "IDELAY") idelay_m = iob33m.replace("IOB", "IDELAY")
@ -57,14 +64,15 @@ def gen_sites():
def run(): def run():
# Get all [LR]IOI3 tiles # Get all [LR]IOI3 tiles
tiles = list(gen_sites()) tiles = list(gen_sites())
# Header # Header
print("// Tile count: %d" % len(tiles)) print("// Tile count: %d" % len(tiles))
print("// Seed: '%s'" % os.getenv("SEED")) print("// Seed: '%s'" % os.getenv("SEED"))
print(''' print(
'''
module top ( module top (
input wire [{N}:0] di, input wire [{N}:0] di,
output wire [{N}:0] do output wire [{N}:0] do
@ -88,13 +96,21 @@ wire [{N}:0] do_buf;
idelay = sites[3] idelay = sites[3]
params = { params = {
"LOC": "\"" + idelay + "\"", "LOC":
"IDELAY_TYPE": "\"" + random.choice(["FIXED", "VARIABLE", "VAR_LOAD", "VAR_LOAD_PIPE"]) + "\"", "\"" + idelay + "\"",
"IDELAY_VALUE": random.randint(0, 31), "IDELAY_TYPE":
"DELAY_SRC": "\"" + random.choice(["IDATAIN", "DATAIN"]) + "\"", "\"" + random.choice(
"HIGH_PERFORMANCE_MODE": "\"" + random.choice(["TRUE", "FALSE"]) + "\"", ["FIXED", "VARIABLE", "VAR_LOAD", "VAR_LOAD_PIPE"]) + "\"",
"CINVCTRL_SEL": "\"" + random.choice(["TRUE", "FALSE"]) + "\"", "IDELAY_VALUE":
"PIPE_SEL": "\"" + random.choice(["TRUE", "FALSE"]) + "\"", random.randint(0, 31),
"DELAY_SRC":
"\"" + random.choice(["IDATAIN", "DATAIN"]) + "\"",
"HIGH_PERFORMANCE_MODE":
"\"" + random.choice(["TRUE", "FALSE"]) + "\"",
"CINVCTRL_SEL":
"\"" + random.choice(["TRUE", "FALSE"]) + "\"",
"PIPE_SEL":
"\"" + random.choice(["TRUE", "FALSE"]) + "\"",
} }
if params["IDELAY_TYPE"] != "\"VAR_LOAD_PIPE\"": if params["IDELAY_TYPE"] != "\"VAR_LOAD_PIPE\"":
@ -115,7 +131,8 @@ wire [{N}:0] do_buf;
print('IBUF ibuf_%03d (.I(di[%3d]), .O(di_buf[%3d]));' % (i, i, i)) print('IBUF ibuf_%03d (.I(di[%3d]), .O(di_buf[%3d]));' % (i, i, i))
print('(* LOC="%s", KEEP, DONT_TOUCH *)' % iob_o) print('(* LOC="%s", KEEP, DONT_TOUCH *)' % iob_o)
print('OBUF obuf_%03d (.I(do_buf[%3d]), .O(do[%3d]));' % (i, i, i)) print('OBUF obuf_%03d (.I(do_buf[%3d]), .O(do[%3d]));' % (i, i, i))
print('mod #(%s) mod_%03d (.I(di_buf[%3d]), .O(do_buf[%3d]));' % print(
'mod #(%s) mod_%03d (.I(di_buf[%3d]), .O(do_buf[%3d]));' %
(param_str, i, i, i)) (param_str, i, i, i))
data.append(params) data.append(params)
@ -124,7 +141,8 @@ wire [{N}:0] do_buf;
with open("params.json", "w") as fp: with open("params.json", "w") as fp:
json.dump(data, fp, sort_keys=True, indent=1) json.dump(data, fp, sort_keys=True, indent=1)
print(''' print(
'''
// IDELAYCTRL // IDELAYCTRL
(* KEEP, DONT_TOUCH *) (* KEEP, DONT_TOUCH *)
IDELAYCTRL idelayctrl(); IDELAYCTRL idelayctrl();
@ -190,4 +208,5 @@ LUT6 #(.INIT(32'hDEADBEEF)) lut (
endmodule endmodule
''') ''')
run() run()

1
fuzzers/Makefile
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@ -86,6 +86,7 @@ $(eval $(call fuzzer,030-iob,005-tilegrid))
$(eval $(call fuzzer,032-cmt-pll,005-tilegrid)) $(eval $(call fuzzer,032-cmt-pll,005-tilegrid))
$(eval $(call fuzzer,034-cmt-pll-pips,005-tilegrid)) $(eval $(call fuzzer,034-cmt-pll-pips,005-tilegrid))
$(eval $(call fuzzer,035-iob-ilogic,005-tilegrid)) $(eval $(call fuzzer,035-iob-ilogic,005-tilegrid))
$(eval $(call fuzzer,035a-iob-idelay,005-tilegrid))
$(eval $(call fuzzer,036-iob-ologic,005-tilegrid)) $(eval $(call fuzzer,036-iob-ologic,005-tilegrid))
$(eval $(call fuzzer,038-cfg,005-tilegrid)) $(eval $(call fuzzer,038-cfg,005-tilegrid))
$(eval $(call fuzzer,040-clk-hrow-config,005-tilegrid)) $(eval $(call fuzzer,040-clk-hrow-config,005-tilegrid))