Add IFF.IN_USE feature.

This addresses missing features in
https://github.com/SymbiFlow/symbiflow-arch-defs/issues/1536 .

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>

fuzzers/035b-iob-iserdes/Makefile

@@ -16,6 +16,7 @@ build/segbits_xioi3.rdb2: $(SPECIMENS_OK)
 build/segbits_xioi3.rdb: build/segbits_xioi3.rdb2
 	# Keep only solution for ISERDES related features.
 	grep -e ".ISERDES." $^ >$@
+	grep -e ".IDDR.IN_USE." $^ >>$@
 
 build/segbits_xioi3.db: build/segbits_xioi3.rdb
 	${XRAY_DBFIXUP} --db-root build --zero-db bits.dbf --groups tag_groups.txt --seg-fn-in $^ --seg-fn-out $@

fuzzers/035b-iob-iserdes/generate.py

@@ -9,7 +9,6 @@
 #
 # SPDX-License-Identifier: ISC
 import json
-import re
 
 from prjxray.segmaker import Segmaker
 from prjxray import util
@@ -55,7 +54,7 @@ def run():
 
                 segmk.add_site_tag(loc, "IDDR_OR_ISERDES.IN_USE", 0)
                 segmk.add_site_tag(loc, "ISERDES.IN_USE", 0)
-                segmk.add_site_tag(loc, "IFF.IN_USE", 0)
+                segmk.add_site_tag(loc, "IDDR.IN_USE", 0)
 
                 segmk.add_site_tag(loc, "ISERDES.MODE.MASTER", 0)
                 segmk.add_site_tag(loc, "ISERDES.MODE.SLAVE", 0)
@@ -95,7 +94,6 @@ def run():
             elif verilog.unquote(params["BEL_TYPE"]) == "ISERDESE2":
 
                 segmk.add_site_tag(loc, "IDDR_OR_ISERDES.IN_USE", 1)
-                segmk.add_site_tag(loc, "IFF.IN_USE", 0)
                 segmk.add_site_tag(loc, "ISERDES.IN_USE", 1)
 
                 if "SHIFTOUT_USED" in params:
@@ -121,7 +119,6 @@ def run():
                         for j in data_rates:
                             for k in data_widths[j]:
                                 tag = "ISERDES.%s.%s.W%s" % (i, j, k)
-                                val = 0
 
                                 if i == iface_type:
                                     if j == data_rate:
@@ -202,10 +199,10 @@ def run():
                         loc, "ISERDES.OFB_USED", int(value == "TRUE"))
 
             # Site used as IDDR
-            elif verilog.unquote(params["BEL_TYPE"]) == "IDDR":
+            elif verilog.unquote(params["BEL_TYPE"]) in ["IDDR",
-
+                                                         "IDDR_NO_CLK"]:
                 segmk.add_site_tag(loc, "IDDR_OR_ISERDES.IN_USE", 1)
-                segmk.add_site_tag(loc, "IFF.IN_USE", 1)
+                segmk.add_site_tag(loc, "IDDR.IN_USE", 1)
                 segmk.add_site_tag(loc, "ISERDES.IN_USE", 0)
 
                 if "DDR_CLK_EDGE" in params:

fuzzers/035b-iob-iserdes/top.py

@@ -11,7 +11,6 @@
 import os, random
 random.seed(int(os.getenv("SEED"), 16))
 
-import re
 import json
 
 from prjxray import util
@@ -38,16 +37,6 @@ def gen_sites():
         iob_gridinfo = grid.gridinfo_at_loc(
             grid.loc_of_tilename(iob_tile_name))
 
-        # Find IOI tile adjacent to IOB
-        for suffix in ["IOI3", "IOI3_TBYTESRC", "IOI3_TBYTETERM"]:
-            try:
-                ioi_tile_name = iob_tile_name.replace("IOB33", suffix)
-                ioi_gridinfo = grid.gridinfo_at_loc(
-                    grid.loc_of_tilename(ioi_tile_name))
-                break
-            except KeyError:
-                pass
-
         iob33s = [k for k, v in iob_gridinfo.sites.items() if v == "IOB33S"][0]
         iob33m = [k for k, v in iob_gridinfo.sites.items() if v == "IOB33M"][0]
 
@@ -137,7 +126,7 @@ def gen_iddr(loc):
         "USE_IDELAY":
         random.randint(0, 1),
         "BEL_TYPE":
-        verilog.quote("IDDR"),
+        verilog.quote(random.choice(["IDDR", "IDDR_NO_CLK"])),
         "INIT_Q1":
         random.randint(0, 1),
         "INIT_Q2":
@@ -455,6 +444,33 @@ end else if (IS_USED && BEL_TYPE == "IDDR") begin
   assign x[8] = (IDELMUX) ? ddly : I;
   assign x[7:2] = 0;
 
+end else if (IS_USED && BEL_TYPE == "IDDR_NO_CLK") begin
+
+  // IDDR
+  (* LOC=SITE_LOC, KEEP, DONT_TOUCH *)
+  IDDR #
+  (
+  .IS_C_INVERTED(IS_C_INVERTED),
+  .IS_D_INVERTED(IS_D_INVERTED),
+  .DDR_CLK_EDGE(DDR_CLK_EDGE),
+  .INIT_Q1(INIT_Q1),
+  .INIT_Q2(INIT_Q2),
+  .SRTYPE(SRTYPE)
+  )
+  iddr
+  (
+  .C(),
+  .CE( (CE1USED) ? ce : 1'hx ),
+  .D( (IFFDELMUX) ? ddly : I  ),
+  .S( (SR_MODE == "SET") ? rst : 1'd0 ),
+  .R( (SR_MODE == "RST") ? rst : 1'd0 ),
+  .Q1(x[0]),
+  .Q2(x[1])
+  );
+
+  assign x[8] = (IDELMUX) ? ddly : I;
+  assign x[7:2] = 0;
+
 end else begin
 
   assign x[0] = I;

utils/dbfixup.py

@@ -421,6 +421,17 @@ def remove_ambiguous_solutions(fn_in, db_lines, strict=True, verbose=True):
     return drops, output_lines
 
 
+def format_bits(tag, bits):
+    """ Format tag and bits into line. """
+    bit_strs = []
+    for bit in sorted(list(bits), key=lambda b: b[1]):
+        s = "!" if not bit[0] else ""
+        s += "{:02d}_{:02d}".format(bit[1][0], bit[1][1])
+        bit_strs.append(s)
+
+    return " ".join([tag] + bit_strs)
+
+
 def group_tags(lines, tag_groups, bit_groups):
     """
     Implements tag grouping. If a tag belongs to a group then the common bits
@@ -430,13 +441,13 @@ def group_tags(lines, tag_groups, bit_groups):
     >>> bg = [{(1, 2), (3, 4)}]
     >>> res = group_tags({"A 1_2", "B 3_4"}, tg, bg)
     >>> (res[0], sorted(list(res[1])))
-    (2, ['A 1_2 !3_4', 'B !1_2 3_4'])
+    (2, ['A 01_02 !03_04', 'B !01_02 03_04'])
 
     >>> tg = [{"A", "B"}]
     >>> bg = [{(1, 2), (3, 4)}]
     >>> res = group_tags({"A 1_2", "B 3_4", "C 1_2"}, tg, bg)
     >>> (res[0], sorted(list(res[1])))
-    (2, ['A 1_2 !3_4', 'B !1_2 3_4', 'C 1_2'])
+    (2, ['A 01_02 !03_04', 'B !01_02 03_04', 'C 01_02'])
     """
 
     changes = 0
@@ -467,13 +478,7 @@ def group_tags(lines, tag_groups, bit_groups):
                         bits.add((False, zero_bit))
 
                 # Format the line
-                bit_strs = []
+                new_line = format_bits(tag, bits)
-                for bit in sorted(list(bits), key=lambda b: b[1]):
-                    s = "!" if not bit[0] else ""
-                    s += "{}_{}".format(bit[1][0], bit[1][1])
-                    bit_strs.append(s)
-
-                new_line = " ".join([tag] + bit_strs)
 
                 # Add the line
                 new_lines.add(new_line)
@@ -482,7 +487,7 @@ def group_tags(lines, tag_groups, bit_groups):
 
         # It does not, pass it through unchanged
         else:
-            new_lines.add(line)
+            new_lines.add(format_bits(tag, bits))
 
     return changes, new_lines