lib: replace binary literals with hex literals

binary literals are a C++14 feature.  Use hex literals instead to
keep C++11 compatibility.

Signed-off-by: Rick Altherr <kc8apf@kc8apf.net>
Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com>
This commit is contained in:
Rick Altherr 2017-12-12 11:36:50 -08:00 committed by Tim 'mithro' Ansell
parent d7011b845f
commit 9cbd9bac28
4 changed files with 32 additions and 32 deletions

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@ -8,10 +8,10 @@ namespace xilinx {
namespace xc7series {
enum class BlockType : unsigned int {
CLB_IO_CLK = 0b000,
BLOCK_RAM = 0b001,
CFG_CLB = 0b010,
/* reserved = 0b011, */
CLB_IO_CLK = 0x0,
BLOCK_RAM = 0x1,
CFG_CLB = 0x2,
/* reserved = 0x3, */
};
std::ostream &operator<<(std::ostream &o, BlockType value);

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@ -8,26 +8,26 @@ namespace xilinx {
namespace xc7series {
enum class ConfigurationRegister : unsigned int {
CRC = 0b00000,
FAR = 0b00001,
FDRI = 0b00010,
FDRO = 0b00011,
CMD = 0b00100,
CTL0 = 0b00101,
MASK = 0b00110,
STAT = 0b00111,
LOUT = 0b01000,
COR0 = 0b01001,
MFWR = 0b01010,
CBC = 0b01011,
IDCODE = 0b01100,
AXSS = 0b01101,
COR1 = 0b01110,
WBSTAR = 0b10000,
TIMER = 0b10001,
BOOTSTS = 0b10110,
CTL1 = 0b11000,
BSPI = 0b11111,
CRC = 0x00,
FAR = 0x01,
FDRI = 0x02,
FDRO = 0x03,
CMD = 0x04,
CTL0 = 0x05,
MASK = 0x06,
STAT = 0x07,
LOUT = 0x08,
COR0 = 0x09,
MFWR = 0x0a,
CBC = 0x0b,
IDCODE = 0x0c,
AXSS = 0x0d,
COR1 = 0x0e,
WBSTAR = 0x10,
TIMER = 0x11,
BOOTSTS = 0x16,
CTL1 = 0x18,
BSPI = 0x1F,
};
std::ostream& operator<<(std::ostream &o, const ConfigurationRegister &value);

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@ -42,7 +42,7 @@ TEST(BitstreamReaderTest,
TEST(BitstreamReaderTest, ParsesType1Packet) {
std::vector<uint8_t> bitstream{
0xAA, 0x99, 0x55, 0x66, // sync
0b001'00'000, 0b00000000, 0b000'00'000, 0b00000000, // NOP
0x20, 0x00, 0x00, 0x00, // NOP
};
auto reader = xc7series::BitstreamReader::InitWithBytes(bitstream);
ASSERT_TRUE(reader);
@ -57,8 +57,8 @@ TEST(BitstreamReaderTest, ParsesType1Packet) {
TEST(BitstreamReaderTest, ParseType2PacketWithoutType1Fails) {
std::vector<uint8_t> bitstream{
0xAA, 0x99, 0x55, 0x66, // sync
0b010'00'000, 0b00000000, 0b000'00'000, 0b00000000, // NOP
0xAA, 0x99, 0x55, 0x66, // sync
0x40, 0x00, 0x00, 0x00, // Type 2 NOP
};
auto reader = xc7series::BitstreamReader::InitWithBytes(bitstream);
ASSERT_TRUE(reader);
@ -68,9 +68,9 @@ TEST(BitstreamReaderTest, ParseType2PacketWithoutType1Fails) {
TEST(BitstreamReaderTest, ParsesType2AfterType1Packet) {
std::vector<uint8_t> bitstream{
0xAA, 0x99, 0x55, 0x66, // sync
0b001'01'000, 0b00000000, 0b011'00'000, 0b00000000, // Read
0b010'01'000, 0b00000000, 0b0000000000, 0b00000100,
0xAA, 0x99, 0x55, 0x66, // sync
0x28, 0x00, 0x60, 0x00, // Type 1 Read zero bytes from 6
0x48, 0x00, 0x00, 0x04, // Type 2 write of 4 words
0x1, 0x2, 0x3, 0x4,
0x5, 0x6, 0x7, 0x8,
0x9, 0xA, 0xB, 0xC,

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@ -17,7 +17,7 @@ ConfigurationPacket::InitWithWords(absl::Span<uint32_t> words,
uint32_t header_type = bit_field_get(words[0], 31, 29);
switch (header_type) {
case 0b001: {
case 0x1: {
Opcode opcode = static_cast<Opcode>(
bit_field_get(words[0], 28, 27));
ConfigurationRegister address =
@ -35,7 +35,7 @@ ConfigurationPacket::InitWithWords(absl::Span<uint32_t> words,
{{header_type, opcode, address,
words.subspan(1, data_word_count)}}};
}
case 0b010: {
case 0x2: {
absl::optional<ConfigurationPacket> packet;
Opcode opcode = static_cast<Opcode>(
bit_field_get(words[0], 28, 27));