mirror of https://github.com/openXC7/prjxray.git
Attempt to fix flaky 041 fuzzer.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
This commit is contained in:
Keith Rothman
parent
e6727e6c60
commit
90715ab3e4
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@ -2,18 +2,9 @@ export FUZDIR=$(shell pwd)
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PIP_TYPE?=clk_hrow
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PIPLIST_TCL=$(FUZDIR)/clk_hrow_pip_list.tcl
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ifeq (${XRAY_PART}, xc7z010clg400-1)
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# xc7z010clg400-1 is missing some side clock connections, so these bits cannot
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# be documented.
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# FIXME: Use EXCLUDE_RE rather than complicated include RE.
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TODO_RE="[^\.]+\.CLK_HROW_CK_MUX_OUT_[LR][0-9]+\.CLK_HROW_.*[KR_][0-9]+"
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TODO_EXCLUDE_RE="^CLK_HROW_BOT_R.*CASCIN[0-9]+$$"
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else
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TODO_RE=".*"
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TODO_EXCLUDE_RE="^CLK_HROW_BOT_R.*CASCIN[0-9]+$$"
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endif
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MAKETODO_FLAGS=--sides "bot_r,top_r" --pip-type ${PIP_TYPE} --seg-type clk_hrow --re $(TODO_RE) --exclude-re $(TODO_EXCLUDE_RE)
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MAKETODO_FLAGS=--sides "bot_r,top_r" --pip-type ${PIP_TYPE} --seg-type clk_hrow --re $(TODO_RE)
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N = 50
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# These PIPs all appear to be either a 2 bit solutions.
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@ -1,12 +1,30 @@
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proc print_tile_pips {tile_type filename} {
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set tile [lindex [get_tiles -filter "TYPE == $tile_type"] 0]
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puts "Dumping PIPs for tile $tile ($tile_type) to $filename."
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set fp [open $filename w]
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foreach pip [lsort [get_pips -of_objects [get_tiles $tile]]] {
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set src [get_wires -uphill -of_objects $pip]
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set dst [get_wires -downhill -of_objects $pip]
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if {[llength [get_nodes -uphill -of_objects [get_nodes -of_objects $dst]]] != 1} {
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puts $fp "$tile_type.[regsub {.*/} $dst ""].[regsub {.*/} $src ""]"
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set pips [dict create]
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foreach tile [get_tiles -filter "TYPE == $tile_type"] {
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puts "Dumping PIPs for tile $tile ($tile_type) to $filename."
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foreach pip [lsort [get_pips -of_objects $tile]] {
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set src [get_wires -uphill -of_objects $pip]
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set dst [get_wires -downhill -of_objects $pip]
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# Skip pips with disconnected nodes
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set src_node [get_nodes -of_objects $src]
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if { $src_node == {} } {
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continue
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}
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set dst_node [get_nodes -of_objects $src]
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if { $dst_node == {} } {
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continue
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}
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if {[llength [get_nodes -uphill -of_objects [get_nodes -of_objects $dst]]] != 1} {
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set pip_string "$tile_type.[regsub {.*/} $dst ""].[regsub {.*/} $src ""]"
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if ![dict exists $pips $pip_string] {
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puts $fp $pip_string
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dict set pips $pip_string 1
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}
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}
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}
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}
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close $fp
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@ -24,119 +24,209 @@ proc write_pip_txtdata {filename} {
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}
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proc load_todo {} {
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set fp [open "../../todo.txt" r]
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set todo_lines {}
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set fp [open "../../todo_all.txt" r]
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# Create map of pip destinations to remaining sources for that pip
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set todo_map [dict create]
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for {gets $fp line} {$line != ""} {gets $fp line} {
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lappend todo_lines [split $line .]
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set parts [split $line .]
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if ![string match "*CLK_HROW_CK_IN_*" [lindex $parts 2]] {
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continue
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}
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dict lappend todo_map [lindex $parts 1] [list [lindex $parts 0] [lindex $parts 2]]
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}
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close $fp
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return $todo_lines
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return $todo_map
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}
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proc route_todo {} {
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puts "Checking TODO's"
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set todo_lines [load_todo]
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set srcs {}
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foreach todo $todo_lines {
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set src [lindex $todo 2]
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set todo_map [load_todo]
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if [string match "*CLK_HROW_CK_IN_*" $src] {
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lappend srcs $src
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}
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}
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set nets [get_nets]
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set srcs [lsort -unique $srcs]
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set todo_nets [dict create]
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set used_destinations [dict create]
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set nets [get_nets -hierarchical "*clock*"]
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set found_wires {}
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set remaining_nets {}
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foreach net $nets {
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set wires [get_wires -of_objects $net]
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# Check to see if this net is one we are interested in
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set wires [get_wires -of_objects $net -filter {TILE_NAME =~ *CLK_HROW*}]
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set is_gclk_net 0
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foreach wire $wires {
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if [regexp "CLK_HROW_CK_IN_\[LR\]\[0-9\]+" $wire] {
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# Route already going where we want it, continue
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puts "Checking wire $wire."
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set wire [lindex [split $wire "/"] 1]
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if {[lsearch -regexp $srcs "$wire$"] != -1} {
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puts "Found in TODO list, removing from list."
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lappend found_wires $wire
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# Fix route that is using target net.
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set_property is_route_fixed 1 $net
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} else {
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puts "Wire not in TODO list, adding to reroute list."
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lappend remaining_nets $net
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}
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break
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}
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}
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}
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set found_wires [lsort -unique $found_wires]
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foreach wire $found_wires {
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puts "Removing $wire"
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set srcs [lsearch -regexp -all -inline -not $srcs "$wire$"]
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}
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puts "Remaining TODOs:"
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foreach src $srcs {
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puts $src
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}
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set remaining_nets [lsort -unique $remaining_nets]
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set completed_todos {}
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foreach net $remaining_nets {
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set wires [get_wires -of_objects $net]
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set clk_in_wire ""
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foreach wire $wires {
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if [regexp "CLK_HROW_CK_IN_(\[LR\])\[0-9\]+" $wire match lr] {
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set clk_in_wire $wire
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puts "Check wire $wire in $net"
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if [string match "*CLK_HROW_CK_IN_*" $wire] {
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set gclk_tile [lindex [split $wire /] 0]
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set gclk_wire [lindex [split $wire /] 1]
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set is_gclk_net 1
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break
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}
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}
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if {$clk_in_wire == ""} {
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error "$net does not appear to be correct net for rerouting?"
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if {$is_gclk_net == 0} {
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puts "$net not going to a HCLK port, skipping."
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continue
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}
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puts ""
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puts "Rerouting net $net at $clk_in_wire ($lr)"
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puts "Net $net wires:"
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foreach wire [get_wires -of_objects $net] {
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puts " - $wire"
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}
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# Find an input in the todo list that this can can drive.
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foreach src $srcs {
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if {[lsearch -exact $completed_todos $src] != -1} {
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foreach wire $wires {
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set tile [lindex [split $wire /] 0]
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set wire [lindex [split $wire /] 1]
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if { $tile != $gclk_tile } {
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continue
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}
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if [regexp "CLK_HROW_CK_IN_$lr\[0-9\]+" $src] {
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puts "Found target pip $src for net $net."
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set tile [get_tiles -of_objects $clk_in_wire]
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set tile_type [get_property TILE_TYPE [get_tiles $tile]]
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set target_wire [get_wires "$tile/$src"]
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set target_node [get_nodes -of_objects $target_wire]
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if {[llength $target_node] == 0} {
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error "Failed to find node for $tile/$src."
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if { ![dict exists $todo_map $wire] } {
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continue
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}
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set srcs [dict get $todo_map $wire]
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# This net is interesting, see if it is already going somewhere we
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# want.
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set found_target 0
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foreach other_wire $wires {
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if { $found_target == 1 } {
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break
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}
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set origin_node [get_nodes -of_objects [get_site_pins -filter {DIRECTION == OUT} -of_objects $net]]
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set destination_nodes [filter [get_nodes -of_objects [get_site_pins -filter {DIRECTION == IN} -of_objects $net]] {NAME =~ *CLK_HROW*}]
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route_design -unroute -nets $net
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set new_route [find_routing_path -to $target_node -from $origin_node]
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puts "Origin node: $origin_node"
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puts "Target wire: $target_wire"
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puts "Target node: $target_node"
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puts "Destination nodes: $destination_nodes"
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set other_wire [lindex [split $other_wire /] 1]
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# Only need to set route to one of the destinations.
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# Router will handle the rest.
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set_property FIXED_ROUTE [concat $new_route [lindex $destination_nodes 0]] $net
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if { $wire == $other_wire } {
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continue
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}
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# Remove wire, as we've found a clock to set
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lappend completed_todos $src
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break
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foreach src $srcs {
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set src_tile_type [lindex $src 0]
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if {$src_tile_type != $tile_type} {
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continue
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}
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set src_wire [lindex $src 1]
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if { $other_wire == $src_wire } {
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set found_target 1
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puts "Interesting net $net already going from $wire to $other_wire."
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set_property IS_ROUTE_FIXED 1 $net
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dict set used_destinations "$tile/$src_wire" 1
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break
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}
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}
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}
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if { $found_target == 1 } {
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# Net has an interesting
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continue
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}
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dict set todo_nets $net [list $tile $wire $gclk_wire]
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puts "Interesting net $net (including $wire and $gclk_wire) is being rerouted."
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}
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}
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set routed_sources [dict create]
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dict for {net tile_wire} $todo_nets {
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if { [get_property IS_ROUTE_FIXED $net] == 1 } {
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puts "Net $net is already routed, skipping."
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continue
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}
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set tile [lindex $tile_wire 0]
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set wire [lindex $tile_wire 1]
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set gclk_wire [lindex $tile_wire 2]
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set srcs [dict get $todo_map $wire]
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puts ""
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puts "Rerouting net $net at $tile / $gclk_wire (type $tile_type)"
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set tile_type [get_property TILE_TYPE [get_tiles $tile]]
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regexp "CLK_HROW_CK_IN_(\[LR\])\[0-9\]+" $gclk_wire match lr
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set todos {}
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foreach src $srcs {
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set src_tile_type [lindex $src 0]
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if {$src_tile_type != $tile_type} {
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continue
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}
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set src_wire [lindex $src 1]
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if [regexp "CLK_HROW_CK_IN_$lr\[0-9\]+" $src_wire] {
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lappend todos $src_wire
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}
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}
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if {[llength $todos] == 0} {
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puts "No inputs for net $net."
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dict set used_destinations "$tile/$gclk_wire" 1
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continue
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}
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puts "All todos for $tile_type / $wire"
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foreach src_wire $todos {
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puts " - $src_wire"
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}
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# Find an input in the todo list that this can can drive.
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set set_new_route 0
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foreach src_wire $todos {
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if { [dict exists $used_destinations "$tile/$src_wire"] } {
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puts "Not routing to $tile / $src_wire, in use."
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continue
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}
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puts "Attempting to route to $src_wire for net $net."
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set target_wire [get_wires "$tile/$src_wire"]
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set target_node [get_nodes -of_objects $target_wire]
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if {[llength $target_node] == 0} {
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continue
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}
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set origin_node [get_nodes -of_objects [get_site_pins -filter {DIRECTION == OUT} -of_objects $net]]
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if [dict exists $routed_sources $origin_node] {
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puts "Skip net $net, already routed."
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continue
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}
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route_design -unroute -nets $net
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set old_nets [get_nets -of_objects $target_node]
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if { $old_nets != {} } {
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puts "Unrouting $old_nets"
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route_design -unroute -nets $old_nets
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}
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set old_nets [get_nets -of_objects $origin_node]
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if { $old_nets != {} } {
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puts "Unrouting $old_nets"
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route_design -unroute -nets $old_nets
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}
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set new_route [find_routing_path -to $target_node -from $origin_node]
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puts "Origin node: $origin_node"
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puts "Target wire: $target_wire"
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puts "Target node: $target_node"
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# Only need to set route to one of the destinations.
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# Router will handle the rest.
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set_property FIXED_ROUTE $new_route $net
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dict set used_destinations "$tile/$src_wire" 1
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dict set routed_sources "$origin_node" 1
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set set_new_route 1
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break
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}
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}
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}
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@ -275,6 +275,25 @@ def bufhce_in_todo(todos, site):
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else:
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return True
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def need_gclk_connection(todos, site):
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x, y = BUFGCTRL_XY_FUN(site)
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assert x == 0
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src_wire = 'CLK_HROW_R_CK_GCLK{}'.format(y)
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for srcs in todos.values():
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if src_wire in srcs:
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return True
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return False
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def only_gclk_left(todos):
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for srcs in todos.values():
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for src in srcs:
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if 'GCLK' not in src:
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return False
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return True
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def main():
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"""
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@ -303,6 +322,9 @@ module top();
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todos = read_todo()
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if only_gclk_left(todos):
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mmcm_pll_dir = 'NONE'
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if not mmcm_pll_only:
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if need_int_connections(todos):
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for _ in range(10):
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@ -3,12 +3,11 @@ PIP_TYPE?=hclk_cmt
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PIPLIST_TCL=$(FUZDIR)/hclk_cmt_pip_list.tcl
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TODO_RE=".*"
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# Skipped pips:
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# - LEAF wires are disconnected
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# - FREQ_REF is only used by interconnect clocks, so low likelyhood of usage.
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# A BUFR can be used to clock divide if needed
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# - PHSR PIPs are connected to PHASER sites, which are undocumented, so avoid
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# for now.
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EXCLUDE_RE="(^.*LEAF)|(HCLK_CMT_L\.[^.]+\.HCLK_CMT_MUX_CLK_[0-9]+)|(HCLK_CMT\.[^.]+\.HCLK_CMT_CK_IN[0-9]+)|(^.*BUFMR)|(^.*FREQ_REF)|(^.*PHSR)|(^.*CLK_PLL7)|(^.*CLK_MMCM13)"
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EXCLUDE_RE="(^.*BUFMR)|(^.*FREQ_REF)|(^.*PHSR)|(^.*CLK_PLL7)|(^.*CLK_MMCM13)"
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MAKETODO_FLAGS=--sides ",l" --pip-type ${PIP_TYPE} --seg-type ${PIP_TYPE} --re $(TODO_RE) --exclude-re $(EXCLUDE_RE)
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N = 50
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@ -1,12 +1,30 @@
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proc print_tile_pips {tile_type filename} {
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set tile [lindex [get_tiles -filter "TYPE == $tile_type"] 0]
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puts "Dumping PIPs for tile $tile ($tile_type) to $filename."
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set fp [open $filename w]
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foreach pip [lsort [get_pips -of_objects [get_tiles $tile]]] {
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set src [get_wires -uphill -of_objects $pip]
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set dst [get_wires -downhill -of_objects $pip]
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if {[llength [get_nodes -uphill -of_objects [get_nodes -of_objects $dst]]] != 1} {
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puts $fp "$tile_type.[regsub {.*/} $dst ""].[regsub {.*/} $src ""]"
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set pips [dict create]
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foreach tile [get_tiles -filter "TYPE == $tile_type"] {
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puts "Dumping PIPs for tile $tile ($tile_type) to $filename."
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foreach pip [lsort [get_pips -of_objects $tile]] {
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set src [get_wires -uphill -of_objects $pip]
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set dst [get_wires -downhill -of_objects $pip]
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# Skip pips with disconnected nodes
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set src_node [get_nodes -of_objects $src]
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if { $src_node == {} } {
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continue
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}
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set dst_node [get_nodes -of_objects $src]
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if { $dst_node == {} } {
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continue
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}
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if {[llength [get_nodes -uphill -of_objects [get_nodes -of_objects $dst]]] != 1} {
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set pip_string "$tile_type.[regsub {.*/} $dst ""].[regsub {.*/} $src ""]"
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if ![dict exists $pips $pip_string] {
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puts $fp $pip_string
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dict set pips $pip_string 1
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}
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||||
}
|
||||
}
|
||||
}
|
||||
close $fp
|
||||
|
|
|
|||
Loading…
Reference in New Issue