mirror of https://github.com/openXC7/prjxray.git
timfuz: remove nodes from timing4.txt
Signed-off-by: John McMaster <johndmcmaster@gmail.com>
This commit is contained in:
parent
0a7c68b5a0
commit
85862394ce
|
|
@ -38,8 +38,8 @@ proc list_format {l delim} {
|
||||||
return $ret
|
return $ret
|
||||||
}
|
}
|
||||||
|
|
||||||
proc line_net_external {fp net src_site src_site_type src_site_pin src_bel src_bel_pin dst_site dst_site_type dst_site_pin dst_bel dst_bel_pin ico fast_max fast_min slow_max slow_min pips_out nodes_out wires_out} {
|
proc line_net_external {fp net src_site src_site_type src_site_pin src_bel src_bel_pin dst_site dst_site_type dst_site_pin dst_bel dst_bel_pin ico fast_max fast_min slow_max slow_min pips_out wires_out} {
|
||||||
puts $fp "NET,$net,$src_site,$src_site_type,$src_site_pin,$src_bel,$src_bel_pin,$dst_site,$dst_site_type,$dst_site_pin,$dst_bel,$dst_bel_pin,$ico,$fast_max,$fast_min,$slow_max,$slow_min,$pips_out,$nodes_out,$wires_out"
|
puts $fp "NET,$net,$src_site,$src_site_type,$src_site_pin,$src_bel,$src_bel_pin,$dst_site,$dst_site_type,$dst_site_pin,$dst_bel,$dst_bel_pin,$ico,$fast_max,$fast_min,$slow_max,$slow_min,$pips_out,$wires_out"
|
||||||
}
|
}
|
||||||
|
|
||||||
proc line_net_internal {fp net site site_type src_bel src_bel_pin dst_bel dst_bel_pin ico fast_max fast_min slow_max slow_min} {
|
proc line_net_internal {fp net site site_type src_bel src_bel_pin dst_bel dst_bel_pin ico fast_max fast_min slow_max slow_min} {
|
||||||
|
|
@ -52,17 +52,16 @@ proc line_net_internal {fp net site site_type src_bel src_bel_pin dst_bel dst_be
|
||||||
set dst_site_pin ""
|
set dst_site_pin ""
|
||||||
|
|
||||||
set pips_out ""
|
set pips_out ""
|
||||||
set nodes_out ""
|
|
||||||
set wires_out ""
|
set wires_out ""
|
||||||
|
|
||||||
puts $fp "NET,$net,$src_site,$src_site_type,$src_site_pin,$src_bel,$src_bel_pin,$dst_site,$dst_site_type,$dst_site_pin,$dst_bel,$dst_bel_pin,$ico,$fast_max,$fast_min,$slow_max,$slow_min,$pips_out,$nodes_out,$wires_out"
|
puts $fp "NET,$net,$src_site,$src_site_type,$src_site_pin,$src_bel,$src_bel_pin,$dst_site,$dst_site_type,$dst_site_pin,$dst_bel,$dst_bel_pin,$ico,$fast_max,$fast_min,$slow_max,$slow_min,$pips_out,$wires_out"
|
||||||
}
|
}
|
||||||
|
|
||||||
proc write_info4 {} {
|
proc write_info4 {} {
|
||||||
set outdir "."
|
set outdir "."
|
||||||
set fp [open "$outdir/timing4.txt" w]
|
set fp [open "$outdir/timing4.txt" w]
|
||||||
# bel as site/bel, so don't bother with site
|
# bel as site/bel, so don't bother with site
|
||||||
puts $fp "linetype,net,src_site,src_site_type,src_site_pin,src_bel,src_bel_pin,dst_site,dst_site_type,dst_site_pin,dst_bel,dst_bel_pin,ico,fast_max,fast_min,slow_max,slow_min,pips,inodes,wires"
|
puts $fp "linetype,net,src_site,src_site_type,src_site_pin,src_bel,src_bel_pin,dst_site,dst_site_type,dst_site_pin,dst_bel,dst_bel_pin,ico,fast_max,fast_min,slow_max,slow_min,pips,wires"
|
||||||
|
|
||||||
set TIME_start [clock clicks -milliseconds]
|
set TIME_start [clock clicks -milliseconds]
|
||||||
set equations 0
|
set equations 0
|
||||||
|
|
@ -184,19 +183,11 @@ proc write_info4 {} {
|
||||||
}
|
}
|
||||||
set pips_out [list_format "$pips_out" "|"]
|
set pips_out [list_format "$pips_out" "|"]
|
||||||
|
|
||||||
# Write nodes
|
|
||||||
# XXX: remove? don't think I care about these
|
|
||||||
# most for debugging at this point
|
|
||||||
set nodes [get_nodes -of_objects $net -from $src_site_pin -to $dst_site_pin]
|
set nodes [get_nodes -of_objects $net -from $src_site_pin -to $dst_site_pin]
|
||||||
if {$nodes eq ""} {
|
if {$nodes eq ""} {
|
||||||
puts "ERROR: no nodes"
|
puts "ERROR: no nodes"
|
||||||
return
|
return
|
||||||
}
|
}
|
||||||
foreach node $nodes {
|
|
||||||
set nwires [llength [get_wires -of_objects $node]]
|
|
||||||
lappend nodes_out "$node:$nwires"
|
|
||||||
}
|
|
||||||
set nodes_out [list_format "$nodes_out" "|"]
|
|
||||||
|
|
||||||
set wires [get_wires -of_objects $nodes]
|
set wires [get_wires -of_objects $nodes]
|
||||||
# Write wires
|
# Write wires
|
||||||
|
|
@ -207,7 +198,7 @@ proc write_info4 {} {
|
||||||
set wires_out [list_format "$wires_out" "|"]
|
set wires_out [list_format "$wires_out" "|"]
|
||||||
|
|
||||||
incr lines_some_int
|
incr lines_some_int
|
||||||
line_net_external $fp $net $src_site $src_site_type $src_site_pin $src_bel $src_bel_pin $dst_site $dst_site_type $dst_site_pin $dst_bel $dst_bel_pin $ico $fast_max $fast_min $slow_max $slow_min $pips_out $nodes_out $wires_out
|
line_net_external $fp $net $src_site $src_site_type $src_site_pin $src_bel $src_bel_pin $dst_site $dst_site_type $dst_site_pin $dst_bel $dst_bel_pin $ico $fast_max $fast_min $slow_max $slow_min $pips_out $wires_out
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -29,17 +29,6 @@ def parse_pips(pips, speed_i2s):
|
||||||
return [parse_pip(pip, speed_i2s) for pip in pips.split('|')]
|
return [parse_pip(pip, speed_i2s) for pip in pips.split('|')]
|
||||||
|
|
||||||
|
|
||||||
def parse_node(s):
|
|
||||||
node, nwires = s.split(':')
|
|
||||||
return node, int(nwires)
|
|
||||||
|
|
||||||
|
|
||||||
def parse_nodes(nodes):
|
|
||||||
if not nodes:
|
|
||||||
return []
|
|
||||||
return [parse_node(node) for node in nodes.split('|')]
|
|
||||||
|
|
||||||
|
|
||||||
def parse_wire(s, speed_i2s):
|
def parse_wire(s, speed_i2s):
|
||||||
# CLBLM_R_X3Y80/CLBLM_M_D6:952
|
# CLBLM_R_X3Y80/CLBLM_M_D6:952
|
||||||
wirestr, speed_index = s.split(':')
|
wirestr, speed_index = s.split(':')
|
||||||
|
|
@ -55,7 +44,7 @@ def parse_wires(wires, speed_i2s):
|
||||||
|
|
||||||
def gen_timing4(fn, speed_i2s):
|
def gen_timing4(fn, speed_i2s):
|
||||||
f = open(fn, 'r')
|
f = open(fn, 'r')
|
||||||
header_want = "linetype,net,src_site,src_site_type,src_site_pin,src_bel,src_bel_pin,dst_site,dst_site_type,dst_site_pin,dst_bel,dst_bel_pin,ico,fast_max,fast_min,slow_max,slow_min,pips,inodes,wires"
|
header_want = "linetype,net,src_site,src_site_type,src_site_pin,src_bel,src_bel_pin,dst_site,dst_site_type,dst_site_pin,dst_bel,dst_bel_pin,ico,fast_max,fast_min,slow_max,slow_min,pips,wires"
|
||||||
ncols = len(header_want.split(','))
|
ncols = len(header_want.split(','))
|
||||||
|
|
||||||
# src_bel dst_bel ico fast_max fast_min slow_max slow_min pips
|
# src_bel dst_bel ico fast_max fast_min slow_max slow_min pips
|
||||||
|
|
@ -78,7 +67,7 @@ def gen_timing4(fn, speed_i2s):
|
||||||
def net_line():
|
def net_line():
|
||||||
assert len(parts) == ncols, "Expected %u parts, got %u" % (
|
assert len(parts) == ncols, "Expected %u parts, got %u" % (
|
||||||
ncols, len(parts))
|
ncols, len(parts))
|
||||||
_lintype, net, src_site, src_site_type, src_site_pin, src_bel, src_bel_pin, dst_site, dst_site_type, dst_site_pin, dst_bel, dst_bel_pin, ico, fast_max, fast_min, slow_max, slow_min, pips, nodes, wires = parts
|
_lintype, net, src_site, src_site_type, src_site_pin, src_bel, src_bel_pin, dst_site, dst_site_type, dst_site_pin, dst_bel, dst_bel_pin, ico, fast_max, fast_min, slow_max, slow_min, pips, wires = parts
|
||||||
return {
|
return {
|
||||||
'net': net,
|
'net': net,
|
||||||
'src': {
|
'src': {
|
||||||
|
|
@ -104,7 +93,6 @@ def gen_timing4(fn, speed_i2s):
|
||||||
},
|
},
|
||||||
'ico': int(ico),
|
'ico': int(ico),
|
||||||
'pips': parse_pips(pips, speed_i2s),
|
'pips': parse_pips(pips, speed_i2s),
|
||||||
'nodes': parse_nodes(nodes),
|
|
||||||
'wires': parse_wires(wires, speed_i2s),
|
'wires': parse_wires(wires, speed_i2s),
|
||||||
'line': l,
|
'line': l,
|
||||||
}
|
}
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue