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utils: sp6_bitstream_analyzer: Convert f-string to str.format() 

Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
This commit is contained in:
Tomasz Michalak 2019-09-19 11:44:11 +02:00
parent d59247d9c6
commit 8054f88d40
1 changed files with 24 additions and 22 deletions
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46
utils/sp6_bitstream_analyzer.py
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@ -144,8 +144,8 @@ class Bitstream:
if verbose: if verbose:
print( print(
"\tWord: ", hex(word), "\tWord: ", hex(word),
f'Type: {type}, Op: {opcodes[opcode]}, Addr: {reg_addr}, Words: {words}' 'Type: {}, Op: {}, Addr: {}, Words: {}'.format(
) type, opcodes[opcode], reg_addr, words))
if opcode and reg_addr in conf_regs: if opcode and reg_addr in conf_regs:
payload_len = words payload_len = words
continue continue
@ -258,19 +258,19 @@ class Bitstream:
if reg == "CMD": if reg == "CMD":
command = self.parse_command(word) command = self.parse_command(word)
if verbose: if verbose:
print(f"Command: {command}\n") print("Command: {}\n".format(command))
elif reg == "FLR": elif reg == "FLR":
frame_length = word frame_length = word
if verbose: if verbose:
print(f"Frame length: {frame_length}\n") print("Frame length: {}\n".format(frame_length))
elif reg == "COR1": elif reg == "COR1":
conf_options = self.parse_cor1(word) conf_options = self.parse_cor1(word)
if verbose: if verbose:
print(f"COR1 options: {conf_options}\n") print("COR1 options: {}\n".format(conf_options))
elif reg == "COR2": elif reg == "COR2":
conf_options = self.parse_cor2(word) conf_options = self.parse_cor2(word)
if verbose: if verbose:
print(f"COR2 options: {conf_options}\n") print("COR2 options: {}\n".format(conf_options))
elif reg == "IDCODE": elif reg == "IDCODE":
assert payload_len < 3 assert payload_len < 3
if payload_len == 2: if payload_len == 2:
@ -282,67 +282,69 @@ class Bitstream:
elif reg == "MASK": elif reg == "MASK":
mask = word mask = word
if verbose: if verbose:
print(f"Mask value: {mask}\n") print("Mask value: {}\n".format(mask))
elif reg == "CTL": elif reg == "CTL":
ctl_options = self.parse_ctl(word) ctl_options = self.parse_ctl(word)
if verbose: if verbose:
print(f"CTL options: {ctl_options}\n") print("CTL options: {}\n".format(ctl_options))
elif reg == "CCLK_FREQ": elif reg == "CCLK_FREQ":
cclk_freq_options = self.parse_cclk_freq(word) cclk_freq_options = self.parse_cclk_freq(word)
if verbose: if verbose:
print(f"CCLK_FREQ options: {cclk_freq_options}\n") print("CCLK_FREQ options: {}\n".format(cclk_freq_options))
elif reg == "PWRDN_REG": elif reg == "PWRDN_REG":
suspend_reg_options = self.parse_pwrdn(word) suspend_reg_options = self.parse_pwrdn(word)
if verbose: if verbose:
print(f"{reg} options: {suspend_reg_options}\n") print("{} options: {}\n".format(reg, suspend_reg_options))
elif reg == "EYE_MASK": elif reg == "EYE_MASK":
eye_mask = self.parse_eye_mask(word) eye_mask = self.parse_eye_mask(word)
if verbose: if verbose:
print(f"{reg} options: {eye_mask}\n") print("{} options: {}\n".format(reg, eye_mask))
elif reg == "HC_OPT_REG": elif reg == "HC_OPT_REG":
hc_options = self.parse_hc_opt(word) hc_options = self.parse_hc_opt(word)
if verbose: if verbose:
print(f"{reg} options: {hc_options}\n") print("{} options: {}\n".format(reg, hc_options))
elif reg == "CWDT": elif reg == "CWDT":
cwdt_options = self.parse_cwdt(word) cwdt_options = self.parse_cwdt(word)
if verbose: if verbose:
print(f"{reg} options: {cwdt_options}\n") print("{} options: {}\n".format(reg, cwdt_options))
elif reg == "PU_GWE": elif reg == "PU_GWE":
pu_gwe_sequence = self.parse_pu_gwe(word) pu_gwe_sequence = self.parse_pu_gwe(word)
if verbose: if verbose:
print(f"{reg} options: {pu_gwe_sequence}\n") print("{} options: {}\n".format(reg, pu_gwe_sequence))
elif reg == "PU_GTS": elif reg == "PU_GTS":
pu_gts_sequence = self.parse_pu_gts(word) pu_gts_sequence = self.parse_pu_gts(word)
if verbose: if verbose:
print(f"{reg} options: {pu_gts_sequence}\n") print("{} options: {}\n".format(reg, pu_gts_sequence))
elif reg == "MODE_REG": elif reg == "MODE_REG":
mode_options = self.parse_mode(word) mode_options = self.parse_mode(word)
if verbose: if verbose:
print(f"{reg} options: {mode_options}\n") print("{} options: {}\n".format(reg, mode_options))
elif reg == "GENERAL1" or reg == "GENERAL2" \ elif reg == "GENERAL1" or reg == "GENERAL2" \
or reg == "GENERAL3" or reg == "GENERAL4" \ or reg == "GENERAL3" or reg == "GENERAL4" \
or reg == "GENERAL5": or reg == "GENERAL5":
general_options = word general_options = word
if verbose: if verbose:
print(f"{reg} options: {general_options}\n") print("{} options: {}\n".format(reg, general_options))
elif reg == "SEU_OPT": elif reg == "SEU_OPT":
seu_options = self.parse_seu(word) seu_options = self.parse_seu(word)
if verbose: if verbose:
print(f"{reg} options: {seu_options}\n") print("{} options: {}\n".format(reg, seu_options))
elif reg == "EXP_SIGN": elif reg == "EXP_SIGN":
if payload_len == 2: if payload_len == 2:
self.exp_sign = word << 16 self.exp_sign = word << 16
elif payload_len == 1: elif payload_len == 1:
self.exp_sign |= word self.exp_sign |= word
if verbose: if verbose:
print(f"{reg}: {self.exp_sign}\n") print("{}: {}\n".format(reg, self.exp_sign))
elif reg == "FAR_MAJ": elif reg == "FAR_MAJ":
if payload_len == 2: if payload_len == 2:
self.current_far_maj = word self.current_far_maj = word
elif payload_len == 1: elif payload_len == 1:
self.current_far_min = word self.current_far_min = word
if verbose: if verbose:
print(f"{reg}: {self.far_maj} FAR_MIN: {self.far_min}\n") print(
"{}: {} FAR_MIN: {}\n".format(
reg, self.far_maj, self.far_min))
elif reg == "FDRI": elif reg == "FDRI":
if self.fdri_in_progress: if self.fdri_in_progress:
self.frame_data.append(word) self.frame_data.append(word)
@ -357,7 +359,7 @@ class Bitstream:
# Check if 0 words actually means read something # Check if 0 words actually means read something
payload_len = self.curr_fdri_write_len + 2 payload_len = self.curr_fdri_write_len + 2
if verbose: if verbose:
print(f"{reg}: {self.curr_fdri_write_len}\n") print("{}: {}\n".format(reg, self.curr_fdri_write_len))
return payload_len return payload_len
elif reg == "CRC": elif reg == "CRC":
if payload_len == 2: if payload_len == 2:
@ -365,7 +367,7 @@ class Bitstream:
elif payload_len == 1: elif payload_len == 1:
self.curr_crc_check |= word self.curr_crc_check |= word
if verbose: if verbose:
print(f"{reg}: {self.curr_crc_check}\n") print("{}: {}\n".format(reg, self.curr_crc_check))
payload_len -= 1 payload_len -= 1
return payload_len return payload_len