mirror of https://github.com/openXC7/prjxray.git
Merge pull request #60 from mcmasterg/slice_x01
fasm: slice site name as 0/1 instead of global coordinate. Test cleanup
This commit is contained in:
commit
7110a67c55
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@ -144,34 +144,7 @@ def run(f_in, f_out, sparse=False, debug=False):
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segdb = get_database(segj['type'])
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segdb = get_database(segj['type'])
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def clb2dbkey(tile, tilej, site, suffix, value):
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def clb2dbkey(tile, tilej, site, suffix, value):
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def slice_global2x01(tile_name, tile_type, site):
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db_k = '%s.%s.%s' % (tilej['type'], site, suffix)
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# SLICE_X12Y102 => SLICEL_X0
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m = re.match(r'SLICE_X([0-9]+)Y[0-9]+', site)
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xg = int(m.group(1))
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prefix = {
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'CLBLL_L': {
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0: 'SLICEL',
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1: 'SLICEL'
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},
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'CLBLM_L': {
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0: 'SLICEM',
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1: 'SLICEL'
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},
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'CLBLL_R': {
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0: 'SLICEL',
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1: 'SLICEL'
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},
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'CLBLM_R': {
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0: 'SLICEM',
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1: 'SLICEL'
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},
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}
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x01 = xg % 2
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return '%s_X%d' % (prefix[tile_type][x01], x01)
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db_site = slice_global2x01(tile, tilej['type'], site)
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db_k = '%s.%s.%s' % (tilej['type'], db_site, suffix)
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return db_k
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return db_k
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def int2dbkey(tile, tilej, site, suffix, value):
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def int2dbkey(tile, tilej, site, suffix, value):
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@ -11,25 +11,7 @@ def tag2fasm(grid, seg, tag):
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segj = grid['segments'][seg]
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segj = grid['segments'][seg]
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def clbf(seg, tile, tag_post):
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def clbf(seg, tile, tag_post):
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# seg: SEG_CLBLM_L_X10Y102
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return '%s.%s 1' % (tile, tag_post)
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# tile_type: CLBLM_L
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# tag_post: SLICEM_X0.ALUT.INIT[43]
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# To: CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[43] 1
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m = re.match(r'(SLICE[LM])_X([01])[.](.*)', tag_post)
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slicelm = m.group(1)
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off01 = int(m.group(2))
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post = m.group(3)
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# xxx: actually this might not work on decimal overflow (9 => 10)
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for site in grid['tiles'][tile]['sites'].keys():
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m = re.match(r'SLICE_X(.*)Y.*', site)
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sitex = int(m.group(1))
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if sitex % 2 == off01:
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break
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else:
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raise Exception("Failed to match site")
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return '%s.%s.%s 1' % (tile, site, post)
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def intf(seg, tile, tag_post):
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def intf(seg, tile, tag_post):
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# Make the selection an argument of the configruation
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# Make the selection an argument of the configruation
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@ -2,13 +2,13 @@
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# segprint -zd test_data/clb_ff/design.bits
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# segprint -zd test_data/clb_ff/design.bits
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# FF as LDCE
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# FF as LDCE
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CLBLM_L_X10Y102.SLICE_X12Y102.AFF.DMUX.AX 1
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CLBLM_L_X10Y102.SLICEM_X0.AFF.DMUX.AX 1
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CLBLM_L_X10Y102.SLICE_X12Y102.AFF.ZINI 1
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CLBLM_L_X10Y102.SLICEM_X0.AFF.ZINI 1
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CLBLM_L_X10Y102.SLICE_X12Y102.AFF.ZRST 1
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CLBLM_L_X10Y102.SLICEM_X0.AFF.ZRST 1
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CLBLM_L_X10Y102.SLICE_X12Y102.CEUSEDMUX 1
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CLBLM_L_X10Y102.SLICEM_X0.CEUSEDMUX 1
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CLBLM_L_X10Y102.SLICE_X12Y102.SRUSEDMUX 1
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CLBLM_L_X10Y102.SLICEM_X0.SRUSEDMUX 1
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# CLBLM_L_X10Y102.SLICE_X12Y102.FFSYNC 0
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# CLBLM_L_X10Y102.SLICEM_X0.FFSYNC 0
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# CLBLM_L_X10Y102.SLICE_X12Y102.LATCH 0
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# CLBLM_L_X10Y102.SLICEM_X0.LATCH 0
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# Note: a number of pseudo pips here
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# Note: a number of pseudo pips here
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# Omitted
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# Omitted
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@ -1,15 +1,15 @@
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# LUT
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# LUT
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[00] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[00] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[08] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[08] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[10] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[10] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[11] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[11] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[13] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[13] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[14] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[14] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[15] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[15] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[41] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[41] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[43] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[43] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[44] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[44] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[46] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[46] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[47] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[47] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[63] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[63] 1
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@ -2,19 +2,19 @@
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# segprint -zd test_data/clb_lut/design.bits
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# segprint -zd test_data/clb_lut/design.bits
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# LUT
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# LUT
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[00] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[00] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[08] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[08] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[10] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[10] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[11] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[11] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[13] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[13] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[14] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[14] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[15] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[15] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[41] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[41] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[43] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[43] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[44] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[44] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[46] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[46] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[47] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[47] 1
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CLBLM_L_X10Y102.SLICE_X12Y102.ALUT.INIT[63] 1
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CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[63] 1
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# din bus
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# din bus
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# din[0]
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# din[0]
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@ -68,11 +68,11 @@ class TestStringMethods(unittest.TestCase):
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def test_lut_int(self):
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def test_lut_int(self):
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self.bitread_frm_equals(
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self.bitread_frm_equals(
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'test_data/lut_int.fasm', 'test_data/clb_lut/design.bits')
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'test_data/lut_int.fasm', 'test_data/lut_int/design.bits')
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def test_ff_int(self):
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def test_ff_int(self):
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self.bitread_frm_equals(
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self.bitread_frm_equals(
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'test_data/ff_int.fasm', 'test_data/clb_ff/design.bits')
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'test_data/ff_int.fasm', 'test_data/ff_int/design.bits')
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def test_sparse(self):
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def test_sparse(self):
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'''Verify sparse equivilent to normal encoding'''
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'''Verify sparse equivilent to normal encoding'''
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@ -33,11 +33,11 @@ class TestStringMethods(unittest.TestCase):
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def test_lut_int(self):
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def test_lut_int(self):
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self.check_segprint_fasm_equiv(
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self.check_segprint_fasm_equiv(
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'test_data/clb_lut/design.segp', 'test_data/lut_int.fasm')
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'test_data/lut_int/design.segp', 'test_data/lut_int.fasm')
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def test_ff_int(self):
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def test_ff_int(self):
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self.check_segprint_fasm_equiv(
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self.check_segprint_fasm_equiv(
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'test_data/clb_ff/design.segp', 'test_data/ff_int.fasm')
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'test_data/ff_int/design.segp', 'test_data/ff_int.fasm')
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if __name__ == '__main__':
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if __name__ == '__main__':
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