iob minitest

Signed-off-by: John McMaster <johndmcmaster@gmail.com>

minitests/iob/.gitignore

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+build

minitests/iob/Makefile

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+all:  build/env build/roi_roi_io.diff
+
+clean:
+	rm -rf build
+
+# hard coded LOCs in .v
+build/env:
+	test "$(XRAY_PART)" = "xc7a50tfgg484-1"
+
+build/roi_roi_io.diff:
+	$(MAKE) -f diff.mk OUT_DIFF=build/roi_io.diff PRJL=roi_io_a PRJR=roi_io_b
+
+

minitests/iob/diff.mk

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+all: $(OUT_DIFF)
+
+$(OUT_DIFF): build/$(PRJL)/design.bits build/$(PRJR)/design.bits
+	diff build/$(PRJL)/design.bits build/$(PRJR)/design.bits >$(OUT_DIFF) || true
+
+build/$(PRJL)/design.bits:
+	PROJECT=$(PRJL) bash runme.sh
+
+build/$(PRJR)/design.bits:
+	PROJECT=$(PRJR) bash runme.sh
+

minitests/iob/runme.sh

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+#!/bin/bash
+
+set -ex
+
+: "${PROJECT:?Need to set PROJECT non-empty}"
+
+# Create build dir
+export SRC_DIR=$PWD
+BUILD_DIR=build/$PROJECT
+mkdir -p $BUILD_DIR
+cd $BUILD_DIR
+
+export TOP_V=$SRC_DIR/top.v
+
+vivado -mode batch -source $SRC_DIR/runme.tcl
+${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design.bits -z -y design.bit
+test -z "$(fgrep CRITICAL vivado.log)"
+

minitests/iob/runme.tcl

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+create_project -force -part $::env(XRAY_PART) design design
+#read_verilog $::env(SRC_DIR)/$::env(PROJECT).v
+read_verilog $::env(TOP_V)
+synth_design -top top -flatten_hierarchy none -verilog_define ROI=$::env(PROJECT)
+
+set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_00) IOSTANDARD LVCMOS33" [get_ports clk]
+set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_01) IOSTANDARD LVCMOS33" [get_ports stb]
+set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_02) IOSTANDARD LVCMOS33" [get_ports di]
+set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_03) IOSTANDARD LVCMOS33" [get_ports do]
+
+create_pblock roi
+set_property EXCLUDE_PLACEMENT 1 [get_pblocks roi]
+add_cells_to_pblock [get_pblocks roi] [get_cells roi]
+resize_pblock [get_pblocks roi] -add "$::env(XRAY_ROI)"
+
+set_property CFGBVS VCCO [current_design]
+set_property CONFIG_VOLTAGE 3.3 [current_design]
+set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design]
+
+set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets clk_IBUF]
+
+place_design
+route_design
+
+write_checkpoint -force design.dcp
+
+# set_property BITSTREAM.GENERAL.DEBUGBITSTREAM Yes [current_design]
+write_bitstream -force design.bit
+

minitests/iob/top.v

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+`ifndef ROI
+ERROR: must set ROI
+`endif
+
+module top(input clk, stb, di, output do);
+	localparam integer DIN_N = 256;
+	localparam integer DOUT_N = 256;
+
+	reg [DIN_N-1:0] din;
+	wire [DOUT_N-1:0] dout;
+
+	reg [DIN_N-1:0] din_shr;
+	reg [DOUT_N-1:0] dout_shr;
+
+	always @(posedge clk) begin
+		din_shr <= {din_shr, di};
+		dout_shr <= {dout_shr, din_shr[DIN_N-1]};
+		if (stb) begin
+			din <= din_shr;
+			dout_shr <= dout;
+		end
+	end
+
+	assign do = dout_shr[DOUT_N-1];
+
+    `ROI
+	    roi (
+		.clk(clk),
+		.din(din),
+		.dout(dout)
+	);
+endmodule
+
+module roi_io_a(input clk, input [255:0] din, output [255:0] dout);
+    assign dout[0] = din[0] & din[1];
+
+    IOBUF_INTERMDISABLE #(
+        .DRIVE(12),
+        .IBUF_LOW_PWR("TRUE"),
+        .IOSTANDARD("DEFAULT"),
+        .SLEW("SLOW"),
+        .USE_IBUFDISABLE("TRUE")
+    ) IOBUF_INTERMDISABLE_inst (
+        .O(1'b0),
+        .IO(1'bz),
+        .I(dout[8]),
+        .IBUFDISABLE(1'b0),
+        .INTERMDISABLE(1'b0),
+        .T(1'b1));
+
+endmodule
+
+module roi_io_b(input clk, input [255:0] din, output [255:0] dout);
+    assign dout[0] = din[0] & din[1];
+
+    wire onet;
+
+    IOBUF_INTERMDISABLE #(
+        .DRIVE(12),
+        .IBUF_LOW_PWR("FALSE"),
+        .IOSTANDARD("DEFAULT"),
+        .SLEW("SLOW"),
+        .USE_IBUFDISABLE("FALSE")
+    ) IOBUF_INTERMDISABLE_inst (
+        .O(onet),
+        .IO(1'bz),
+        .I(dout[8]),
+        .IBUFDISABLE(1'b0),
+        .INTERMDISABLE(1'b0),
+        .T(1'b1));
+
+    PULLUP PULLUP_inst (
+        .O(onet)
+    );
+
+    IOBUF_INTERMDISABLE #(
+        .DRIVE(12),
+        .IBUF_LOW_PWR("FALSE"),
+        .IOSTANDARD("DEFAULT"),
+        .SLEW("SLOW"),
+        .USE_IBUFDISABLE("FALSE")
+    ) i2 (
+        .O(),
+        .IO(1'bz),
+        .I(dout[8]),
+        .IBUFDISABLE(1'b0),
+        .INTERMDISABLE(1'b0),
+        .T(1'b1));
+
+endmodule
+