mirror of https://github.com/openXC7/prjxray.git
Merge pull request #1547 from antmicro/add-gtp-common-tilegrid
gtp_common: add to tilegrid
This commit is contained in:
commit
64858d6437
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@ -5,6 +5,7 @@
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# https://opensource.org/licenses/ISC
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#
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# SPDX-License-Identifier: ISC
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FUZDIR=$(shell pwd)
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BUILD_FOLDER=build_${XRAY_PART}
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BUILD_DIR=$(FUZDIR)/$(BUILD_FOLDER)
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@ -33,6 +34,7 @@ GENERATE_FULL_ARGS=
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ifeq (${XRAY_DATABASE}, artix7)
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# Artix7 only
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TILEGRID_TDB_DEPENDENCIES += pcie/$(BUILD_FOLDER)/segbits_tilegrid.tdb
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TILEGRID_TDB_DEPENDENCIES += gtp_common/$(BUILD_FOLDER)/segbits_tilegrid.tdb
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endif
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ifeq (${XRAY_DATABASE}, zynq7)
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@ -139,6 +141,9 @@ hclk_ioi/$(BUILD_FOLDER)/segbits_tilegrid.tdb: ${BASICDB_TILEGRID}
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pcie/$(BUILD_FOLDER)/segbits_tilegrid.tdb: ${BASICDB_TILEGRID}
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cd pcie && $(MAKE)
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gtp_common/$(BUILD_FOLDER)/segbits_tilegrid.tdb: ${BASICDB_TILEGRID}
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cd gtp_common && $(MAKE)
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$(BUILD_FOLDER)/tilegrid_tdb.json: add_tdb.py $(TILEGRID_TDB_DEPENDENCIES)
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python3 add_tdb.py \
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--fn-in ${BASICDB_TILEGRID} \
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@ -148,14 +153,13 @@ $(BUILD_FOLDER)/tilegrid.json: generate_full.py $(BUILD_FOLDER)/tilegrid_tdb.jso
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cd $(BUILD_FOLDER) && python3 ${FUZDIR}/generate_full.py \
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--json-in tilegrid_tdb.json --json-out ${BUILD_DIR}/tilegrid.json
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run:
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find -name $(BUILD_FOLDER) -exec rm -rf {} \;
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find -name run.${XRAY_PART}.ok -delete
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$(MAKE) clean
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$(MAKE) database
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$(MAKE) pushdb
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touch run.${XRAY_PART}.ok
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clean:
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rm -rf build_* run.*.ok
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rm -rf $(BUILD_FOLDER) run.${XRAY_PART}.ok
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cd clb && $(MAKE) clean
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cd clb_int && $(MAKE) clean
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cd cfg && $(MAKE) clean
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@ -180,6 +184,35 @@ clean:
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cd hclk_cmt && $(MAKE) clean
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cd hclk_ioi && $(MAKE) clean
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cd pcie && $(MAKE) clean
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cd gtp_common && $(MAKE) clean
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.PHONY: database pushdb clean run
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clean_all:
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rm -rf build_* run.*.ok
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cd clb && $(MAKE) clean_all
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cd clb_int && $(MAKE) clean_all
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cd cfg && $(MAKE) clean_all
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cd iob && $(MAKE) clean_all
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cd iob_int && $(MAKE) clean_all
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cd ioi && $(MAKE) clean_all
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cd mmcm && $(MAKE) clean_all
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cd pll && $(MAKE) clean_all
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cd ps7_int && $(MAKE) clean_all
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cd bram && $(MAKE) clean_all
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cd bram_block && $(MAKE) clean_all
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cd bram_int && $(MAKE) clean_all
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cd dsp && $(MAKE) clean_all
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cd dsp_int && $(MAKE) clean_all
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cd fifo_int && $(MAKE) clean_all
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cd monitor && $(MAKE) clean_all
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cd monitor_int && $(MAKE) clean_all
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cd cfg_int && $(MAKE) clean_all
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cd orphan_int_column && $(MAKE) clean_all
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cd clk_hrow && $(MAKE) clean_all
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cd clk_bufg && $(MAKE) clean_all
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cd hclk_cmt && $(MAKE) clean_all
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cd hclk_ioi && $(MAKE) clean_all
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cd pcie && $(MAKE) clean_all
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cd gtp_common && $(MAKE) clean_all
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.PHONY: database pushdb clean clean_all run
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@ -56,7 +56,13 @@ def load_db(fn):
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tparts = tagstr.split('.')
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tile = tparts[0]
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for part in tparts[1:]:
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# Auto align the frame address to the next lowest multiple of 0x80.
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if part == 'AUTO_FRAME':
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frame -= (frame % 0x80)
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continue
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k, v = part.split(':')
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if k == "DFRAME":
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frame -= int(v, 16)
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@ -102,6 +108,7 @@ def run(fn_in, fn_out, verbose=False):
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("hclk_cmt", 30, 10),
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("hclk_ioi", 42, 1),
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("pcie", 36, 101),
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("gtp_common", 42, 101),
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("clb_int", int_frames, int_words),
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("iob_int", int_frames, int_words),
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("bram_int", int_frames, int_words),
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@ -14,6 +14,9 @@ $(SPECIMENS_OK):
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touch $@
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clean:
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rm -rf $(BUILD_DIR)
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clean_all:
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rm -rf build_*
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.PHONY: database clean
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@ -18,6 +18,7 @@ def run(
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fnout,
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oneval,
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dframe,
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auto_frame,
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dword,
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dbit,
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multi=False,
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@ -30,6 +31,8 @@ def run(
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metastr += ".DFRAME:%02x" % dframe
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if multi:
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metastr += ".MULTI"
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if auto_frame:
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metastr += ".AUTO_FRAME"
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tags = dict()
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f = open(design_fn, 'r')
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@ -66,6 +69,10 @@ def main():
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required=False,
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default="",
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help="Reference frame delta (base 16)")
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parser.add_argument(
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"--auto-frame",
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action='store_true',
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help="Auto align frame address to next lowest multiple of 0x80")
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parser.add_argument(
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"--dword",
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type=str,
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@ -85,6 +92,7 @@ def main():
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args.fnout,
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args.oneval,
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None if args.dframe == "" else int(args.dframe, 16),
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args.auto_frame,
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int(args.dword, 10),
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None if args.dbit == "" else int(args.dbit, 10),
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multi=args.multi,
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@ -0,0 +1,10 @@
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# Copyright (C) 2017-2020 The Project X-Ray Authors.
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#
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# Use of this source code is governed by a ISC-style
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# license that can be found in the LICENSE file or at
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# https://opensource.org/licenses/ISC
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#
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# SPDX-License-Identifier: ISC
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N ?= 8
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GENERATE_ARGS?="--oneval 0 --design params.csv --dword 45 --dbit 3 --auto-frame"
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include ../fuzzaddr/common.mk
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@ -0,0 +1,36 @@
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# Copyright (C) 2017-2020 The Project X-Ray Authors
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#
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# Use of this source code is governed by a ISC-style
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# license that can be found in the LICENSE file or at
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# https://opensource.org/licenses/ISC
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#
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# SPDX-License-Identifier: ISC
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source "$::env(XRAY_DIR)/utils/utils.tcl"
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proc run {} {
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create_project -force -part $::env(XRAY_PART) design design
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read_verilog top.v
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synth_design -top top
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set_property CFGBVS VCCO [current_design]
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set_property CONFIG_VOLTAGE 3.3 [current_design]
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set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design]
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# Disable MMCM frequency etc sanity checks
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set_property IS_ENABLED 0 [get_drc_checks {PDRC-29}]
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set_property IS_ENABLED 0 [get_drc_checks {PDRC-30}]
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set_property IS_ENABLED 0 [get_drc_checks {AVAL-50}]
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set_property IS_ENABLED 0 [get_drc_checks {AVAL-53}]
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set_property IS_ENABLED 0 [get_drc_checks {REQP-126}]
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set_property IS_ENABLED 0 [get_drc_checks {REQP-48}]
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set_property IS_ENABLED 0 [get_drc_checks {NSTD-1}]
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set_property IS_ENABLED 0 [get_drc_checks {UCIO-1}]
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place_design
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route_design
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write_checkpoint -force design.dcp
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write_bitstream -force design.bit
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}
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run
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@ -0,0 +1,62 @@
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#!/usr/bin/env python3
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# -*- coding: utf-8 -*-
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#
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# Copyright (C) 2017-2020 The Project X-Ray Authors.
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#
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# Use of this source code is governed by a ISC-style
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# license that can be found in the LICENSE file or at
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# https://opensource.org/licenses/ISC
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#
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# SPDX-License-Identifier: ISC
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import os
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import random
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random.seed(int(os.getenv("SEED"), 16))
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from prjxray import util
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from prjxray.db import Database
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def gen_sites():
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db = Database(util.get_db_root(), util.get_part())
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grid = db.grid()
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for tile_name in sorted(grid.tiles()):
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loc = grid.loc_of_tilename(tile_name)
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gridinfo = grid.gridinfo_at_loc(loc)
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for site_name, site_type in gridinfo.sites.items():
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if site_type in ['GTPE2_COMMON']:
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yield tile_name, site_name
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def write_params(params):
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pinstr = 'tile,val,site\n'
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for tile, (site, val) in sorted(params.items()):
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pinstr += '%s,%s,%s\n' % (tile, val, site)
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open('params.csv', 'w').write(pinstr)
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def run():
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print('''
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module top(input wire in, output wire out);
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''')
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params = {}
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sites = list(gen_sites())
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for (tile_name, site_name), isone in zip(sites,
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util.gen_fuzz_states(len(sites))):
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params[tile_name] = (site_name, isone)
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attr = 4 if isone else 5
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print(
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'''
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(* KEEP, DONT_TOUCH, LOC="{site}" *)
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GTPE2_COMMON #(
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.PLL0_FBDIV_45({attr})
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) {site} ();'''.format(attr=attr, site=site_name))
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print("endmodule")
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write_params(params)
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if __name__ == '__main__':
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run()
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