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lib: xc7series: Account for padding between rows in bitstreams 

There seem to be 2 frames of padding between rows in a bitstream.  For
single-frame writes, these are parsed as type 0 packets and ignored.
Normal bitstreams use a single FDRI write that apparently includes this
padding and needs to be ignored in the auto-increment handling.

Signed-off-by: Rick Altherr <kc8apf@kc8apf.net>
This commit is contained in:
Rick Altherr 2018-01-04 15:14:08 -08:00
parent 6ba411294e
commit 6222be77d3
1 changed files with 13 additions and 8 deletions
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21
lib/include/prjxray/xilinx/xc7series/configuration.h
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@ -112,20 +112,25 @@ absl::optional<Configuration> Configuration::InitWithPackets(
// 7-series frames are 101-words long. Writes to this
// register can be multiples of that to do
// auto-incrementing block writes.
int frames_written = packet.data().size() /
kWordsPerFrame;
for (int ii = 0; ii < frames_written; ++ii) {
for (size_t ii = 0;
ii < packet.data().size();
ii += kWordsPerFrame) {
frames[current_frame_address] =
packet.data().subspan(
ii * kWordsPerFrame,
kWordsPerFrame);
ii, kWordsPerFrame);
auto next_address =
part.GetNextConfigurationFrameAddress(
current_frame_address);
if (next_address) {
current_frame_address = *next_address;
if (!next_address) break;
// Bitstreams appear to have 2 frames of
// padding between rows.
if (next_address->row_address() !=
current_frame_address.row_address()) {
ii += 2 * kWordsPerFrame;
}
current_frame_address = *next_address;
}
break;
}